AD9200JRS View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD9200JRS

Complete 10-Bit, 20 MSPS, 80 mW CMOS A/D Converter

Analog Devices 

AD9200

+FS

–FS

AIN

+F/S RANGE OBTAINED

FROM VREF PIN OR

EXTERNAL REF

REFTS

REFBS

–F/S RANGE OBTAINED

FROM VREF PIN OR

EXTERNAL REF

SHA

10k⍀

AD9200

MODE

(AVDD)

REFTF 0.1␮F

10k⍀

A2

10k⍀

A/D

CORE

4.2k⍀ 0.1␮F

TOTAL

10␮F

10k⍀

0.1␮F

REFBF

a. Top/Bottom Mode

V*

MIDSCALE

AIN

AD9200 MODE

SHA

AVDD/2

10k⍀

REFTF 0.1␮F

REFTS

REFBS

10k⍀

A2

10k⍀

A/D

CORE

4.2k⍀ 0.1␮F

TOTAL

10␮F

INTERNAL 10k⍀

REF

0.1␮F

REFBF

MIDSCALE OFFSET

VOLTAGE IS DERIVED

FROM INTERNAL OR

EXTERNAL REF

* MAXIMUM MAGNITUDE OF V IS DETERMINED

BY INTERNAL REFERENCE

b. Center Span Mode

MAXIMUM MAGNITUDE OF V

IS DETERMINED BY INTERNAL

REFERENCE AND TURNS RATIO

V

AIN

AVDD/2

SHA

10k⍀

AD9200

MODE

AVDD/2

REFTF 0.1␮F

REFTS

REFBS

10k⍀

A2

10k⍀

A/D

CORE

4.2k⍀ 0.1␮F

TOTAL

10␮F

INTERNAL 10k⍀

REF

0.1␮F

REFBF

c. Differential Mode

A1

1V

AD9200

VREF

(1V)

REFSENSE

AVSS

0.1␮F 1.0␮F

d. 1 V Reference

A1

1V

AD9200

10k⍀

VREF

(2V)

0.01␮F

REFSENSE

1.0␮F

10k⍀

AVSS

e. 2 V Reference

A1

1V

AD9200

VREF

(= 1 + RA/RB)

RA

REFSENSE

RB

AVSS

0.1␮F

1.0␮F

INTERNAL 10K REF RESISTORS ARE

SWITCHED OPEN BY THE PRESENSE

OF RA AND RB.

f. Variable Reference

(Between 1 V and 2 V)

Figure 16.

–10–

A1

1V

AD9200

VREF

REFSENSE

AVDD

g. Internal Reference Disable

(Power Reduction)

REV. E

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