ADSP-2188NBSTZ-320 View Datasheet(PDF) - Analog Devices
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Description
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ADSP-2188NBSTZ-320 Datasheet PDF : 48 Pages
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IDMA Read, Long Read Cycle
Table 24. IDMA Read, Long Read Cycle
Parameter
Timing Requirements:
tIKR
IACK Low Before Start of Read1
tIRK
End of read After IACK Low2
Switching Characteristics:
tIKHR
tIKDS
tIKDH
tIKDD
tIRDE
tIRDV
tIRDH1
tIRDH2
IACK High After Start of Read1
IAD15–0 Data Setup Before IACK Low
IAD15 –0 Data Hold After End of Read2
IAD15–0 Data Disabled After End of Read2
IAD15–0 Previous Data Enabled After Start of Read
IAD15–0 Previous Data Valid After Start of Read
IAD15–0 Previous Data Hold After Start of Read (DM/PM1)3
IAD15–0 Previous Data Hold After Start of Read (PM2)4
1 Start of Read = IS Low and IRD Low.
2 End of Read = IS High or IRD High.
3 DM read or first half of PM read.
4 Second half of PM read.
ADSP-218xN
Min
0
2
0.5tCK – 3
0
0
2tCK – 5
tCK – 5
Max
10
10
11
Unit
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
IACK
IS
IRD
IAD15–0
tIKR
tIKHR
tIRK
tIRDE
PREVIOUS
DATA
tIRDV
tIRDH1 OR tIRDH2
tIKDS
READ
DATA
Figure 35. IDMA Read, Long Read Cycle
tIKDH
tIKDD
Rev. A | Page 37 of 48 | August 2006
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