WT6014 View Datasheet(PDF) - Weltrend Semiconductor

Part Name

Description

Manufacturer

WT6014

Digital Monitor Controller

Weltrend Semiconductor 

SYNC Processor

WT6014

Digital Monitor Controller

Ver. 1.21 Jul-31-1998

The SYNC processor can : (1) calculate HSYNC and VSYNC frequencies; (2) detect polarities of

HSYNC and VSYNC inputs; (3) control the output polarities of HSO and VSO pins.

Frequency Calculation

Horizontal frequency and vertical frequencies calculation are done by using one 10-bit up counter.

After power is on, the SYNC processor calculates the vertical frequency first (H/V bit ="0"). A

31.25KHz clock counts the time interval between two VSYNC pulses, then sets the FRDY bit and

generates an INT1 interrupt (if IEN_S bit is "1"). The software can either use interrupt or polling the

FRDY bit to read the correct vertical frequency. After reading the REG#16H, the FRDY bit is cleared

to "0", counter is reset and H/V bit is set. The SYNC processor starts to count horizontal frequency.

The horizontal frequency calculation is done by counting the HSYNC pulses in 8.192 ms. Like the

vertical frequency, the horizontal frequency can be read when the FRDY bit is set or INT1 occurs.

After reading the REG#16H, the FRDY, INT_S and H/V bits are cleared. The SYNC processor starts

to calculate the vertical frequency again, and so on.

The relationships between counter value and frequency are :

Hfreq = (counter value x 122.07) Hz

Vfreq = ( 31250 / counter value ) Hz

The frequency range :

Hfreq range : 122.07 Hz to 124.8 kHz ; Resolution : 122.07Hz

Vfreq range : 30.5 Hz to 31.25 kHz

If counter overflowed, the OVF1 bit will be set to "1". The counter keeps on counting until it

overflowed again. The OVF2 bit and FRDY bit will be set when counter overflowed twice. This is

designed for finding the vertical frequency bellows 15.25Hz. The program should check REG#17H

before reading REG#16H.

Polarity Detect/Control

The polarities of HSYNC and VSYNC are automatically detected and are shown in the H_POL

and V_POL bits. The polarities of HSO and VSO are controlled by the HOP and VOP bits. For

example, set HOP bit to “1”, the HSO pin always outputs positive horizontal sync signal, whatever the

HSYNC input’s polarity is.

Address R/W Initial Bit7

0016H R

--

F9

0017H W

--

0

0017H R

00H H/V

Bit6 Bit5 Bit4 Bit3 Bit2 Bit1

F8

F7

F6

F5

F4

F3

0

0

0

0

0 HOP

-- H_POL V_POL OVF2 OVF1 F1

Bit0

F2

VOP

F0

Bit Name

HOP

VOP

H/V

H_POL

V_POL

OVF2, OVF1

F9-F0

Bit value = “1”

Bit value = “0”

HSO pin is always positive polarity. HSO pin is always negative polarity.

VSO pin is always positive polarity. VSO pin is always negative polarity.

Counter stores horizontal frequency. Counter stores vertical frequency.

HSYNC input is positive polarity. HSYNC input is negative polarity.

VSYNC input is positive polarity. VSYNC input is negative polarity.

OVF2=“1”,OVF1=“0” : Counter overflowed twice.

OVF2=“0”,OVF1=“1” : Counter overflowed once.

OVF2=“0”,OVF1=“0” : No overflow.

OVF2=“1”,OVF1=“1” : No such condition.

Frequency counter value. (F9 is MSB)

Weltrend Semiconductor, Inc.

8

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