IDDIDLE Power Supply Current in Idle Mode No Active I/O, Clk@20MHZ
+25oC, post -300Krad
IDDRESET Power Supply Current in Reset CLK @20 MHz, RESET < VIL
IOS Short Circuit output current (except VDD = 5.5V
-100
for pins listed in Note 5)6,7
IOS1 Short Circuit output current5,6,7 VDD = 5.5V
-200
55
mA
62
76
mA
100
mA
200
mA
Notes:
* Post-radiation performance guaranteed at 25°C per MIL-STD-883.
1. Open-drain outputs with pullups include Port 1, P2.6 and P2.7, and RESET.
2. Test modes are entered at the RESET rising edge by applying VIL to one or more of the following pins: TXD, RD, WR, HLDA. To avoid entering a test mode,
ensure that these pins remain above VIH at the rising edge of RESET.
3. Inputs/outputs with pullup resistors include: RESET, Port 1, P2.0, P2.6, P2.7, WR, BHE, AD0-15, RD, ALE, CLKOUT.
4. Inputs/outputs will pulldown resistors include: NMI, HS0.0-HS0.3, P2.5, INST.
5. Applies to pins RESET, BHE, RD, CLKOUT.
6. Tested only at initial qualification and after any design or process changes which may affect this characteristic.
7. Not more than one output may be shorted at a time for maximum duration of one second.
8. For standard outputs not covered by IOH1 spec.
25