L9362(2013) View Datasheet(PDF) - STMicroelectronics
Part Name
Description
Manufacturer
L9362 Datasheet PDF : 17 Pages
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L9362
ELECTRICAL CHARACTERISTICS (continued)
4.5V VCC 5.5V, -40°C TJ 125°C, unless otherwise specified.
Symbol
Parameter
Test Conditions
Min. Typ. Max. Unit
Serial diagnostic link (external Load capacitor at SDO = 100pF)
fclk
Clock frequency
50% duty cycle.
0
3
MHz
tclh
Minimum time CLK = HIGH
100
ns
tcll
Minimum time CLK = LOW
100
ns
tpcld
Propagation delay
CLK to data at SDO valid.
100
ns
tcsdv
NCS = LOW
To data at SDO valid.
100
ns
tsclch
CLK low before NCS low
Setup time CLK to NCS
100
ns
change H/L.
thclcl
CLK change L/H after
NCS = LOW
100
ns
tscld
SDI input setup time
CLK change H/L after SDI
20
ns
data valid.
thcld
SDI input hold time
SDI data hold after CLK
20
ns
change H/L.
tsclcl
CLK low before NCS high
150
ns
thclch
CLK high after NCS high
150
ns
tpchdz NCS L/H to output data float
100
ns
tfNCS
NCS filter-time
Pulses tfNCS will be
10
40
ns
ignored.
Note: 8. Input Pin Capacitance of SDI, CLK, NCS, NON1, NON2, NON3, NON4 6pF typical; Output Pin Capacitance of SDO 12pF typica
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