3 Volt Intel® Advanced+ Boot Block Flash Memory Stacked-CSP Family
5.11
SRAM Data Retention Characteristics—Extended
Temperature
Table 19. SRAM Data Retention Characteristics(1)—Extended Temperature
Sym
Parameter
Note
Min
Typ
Max
Unit
Test Conditions
VDR
S-VCC for Data Retention
Deep Retention Current -
8-Mbit
1.5
–
3.3
V
CS1# ≥ VCC – 0.2 V
–
–
6
µA
IDR
Deep Retention Current -
2
4-Mbit
–
–
5
µA
S-VCC = 1.5 V
CS1# ≥ VCC – 0.2 V
Deep Retention Current -
2-Mbit
–
–
4
µA
tSDR
Data Retention Set-up Time
0
–
–
ns See Data Retention Waveform
tRDR
Recovery Time
tRC
–
–
ns
NOTES:
1. Typical values at nominal S-VCC, TCASE = +25 °C.
2. S-CS1# ≥VCC – 0.2 V, S-CS2 ≥VCC – 0.2 V (S-CS1# controlled) or S-CS2 ≤ 0.2 V (S-CS2 controlled).
Figure 11. SRAM Data Retention Waveform
CS1# Controlled tSDR
VCC
3.0/2.7V
CS1# (E1) 2.2V
VDR
GND
CS2 Controlled tSDR
VCC
3.0/2.7V
CS2 (E2)
VDR
0.4V
GND
Data Retention Mode
tRDR
Data Retention Mode
tRDR
Datasheet
39