RD28F1602C3B110_03 View Datasheet(PDF) - Intel

Part Name

Description

Manufacturer

RD28F1602C3B110_03

3 Volt Intel® Advanced+ Boot Block Flash Memory(C3) Stacked-Chip Scale Package Family

Intel 

3 Volt Intel® Advanced+ Boot Block Flash Memory Stacked-CSP Family

5.9

SRAM AC Characteristics—Read Operations

Table 17. SRAM AC Characteristics—Read Operations(1)

Density 2/4/8-Mbit

#

Sym

Parameter

Voltage Range 2.7 V– 3.3 V Unit

Note Min Max

R1

tRC

Read Cycle Time

R2

tAA

Address to Output Delay

R3 tCO1, tCO2 S-CS1#, S-CS2 to Output Delay

R4

tOE

S-OE# to Output Delay

R5

tBA

S-UB#, LB# to Output Delay

R6 tLZ1, tLZ2 S-CS1#, S-CS2 to Output in Low Z

R7

tOLZ

S-OE# to Output in Low Z

R8 tHZ1, tHZ2 S-CS1#, S-CS2 to Output in High Z

R9

tOHZ

S-OE# to Output in High Z

R10 tOH

Output Hold from Address, S-CS1#,

S-CS2, or S-OE# Change, Whichever Occurs

First

70

–

–

–

–

2,3

5

3

0

2,3,4

0

3,4

0

0

–

ns

70 ns

70 ns

35 ns

70 ns

–

ns

–

ns

25 ns

25 ns

–

ns

R11 tBLZ

S-UB#, S-LB# to Output in Low Z

3

0

–

ns

R12 tBHZ

S-UB#, S-LB# to Output in High Z

3

0

25 ns

NOTE:

1. See Figure 9, “AC Waveform: SRAM Read Operations” on page 36.

2. At any given temperature and voltage condition, tHZ (Max) is less than and tLZ (Max) both for a given

device and from device to device interconnection.

3. Sampled, but not 100% tested.

4. Timings of tHZ and tOHZ are defined as the time at which the outputs achieve the open circuit conditions

and are not referenced to output voltage levels.

Datasheet

35

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