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AD7450ARMZ View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD7450ARMZ Datasheet PDF : 22 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7450
Pin Number
1
Mnemonic
VREF
2
VIN+
3
VIN–
4
GND
5
CS
6
SDATA
7
SCLK
8
VDD
PIN CONFIGURATION
VREF 1
8 VDD
VIN+ 2 AD7450 7 SCLK
TOP VIEW
VIN– 3 (Not to Scale) 6 SDATA
GND 4
5 CS
PIN FUNCTION DESCRIPTION
Function
Reference Input for the AD7450. An external reference must be applied to this input. For a
5 V power supply, the reference is 2.5 V (± 1%), and for a 3 V power supply, the reference is
1.25 V (± 1%) for specified performance. This pin should be decoupled to GND with a
capacitor of at least 0.1 µF. See the References section for more details.
Positive Terminal for Differential Analog Input
Negative Terminal for Differential Analog Input
Analog Ground. Ground reference point for all circuitry on the AD7450. All analog input
signals and any external reference signal should be referred to this GND voltage.
Chip Select. Active low logic input. This input provides the dual function of initiating a
conversion on the AD7450 and framing the serial data transfer.
Serial Data. Logic output. The conversion result from the AD7450 is provided on this
output as a serial data stream. The bits are clocked out on the falling edge of the SCLK
input. The data stream consists of four leading zeros followed by the 12 bits of conversion
data that is provided MSB first. The output coding is two’s complement.
Serial Clock. Logic input. SCLK provides the serial clock for accessing data from the part.
This clock input is also used as the clock source for the AD7450’s conversion process.
Power Supply Input. VDD is 3 V (± 10%) or 5 V (± 5%). This supply should be decoupled to
GND with a 0.1 µF capacitor and a 10 µF tantalum capacitor.
–6–
Rev. A
 

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