1. 8051 CPU Core
MTV212M64i includes all 8051 functions with the following exceptions:
1.1 The external RAM access is restricted to XFRs/AUXRAM within the MTV212M64i.
1.2 Port0, port3.3, port3.6 and port3.7 are not general-purpose I/O ports. They are dedicated to monitor
1.3 INT1 input pin is not provided, it is connected to special interrupt sources.
1.4 Port2 is shared by special function pins.
In addition, there are 2 timers, 5 interrupt sources and a serial interface compatible with the standard 8051.
Note: All registers listed in this document reside in external RAM area (XFR). For internal RAM memory map,
please refer to 8051 spec.
2. Memory Allocation
2.1 Internal Special Function Registers (SFR)
The SFR is a group of registers that are the same as standard 8051.
2.2 Internal RAM
There are total 256 bytes internal RAM in MTV212M64i, same as standard 8052.
2.3 External Special Function Registers (XFR)
The XFR is a group of registers allocated in the 8051 external RAM area 00h - 7Fh. Most of the registers are
used for monitor control or PWM DAC. Program can initialize Ri value and use "MOVX" instruction to access
2.4 Auxiliary RAM (AUXRAM)
There are a total of 768 bytes auxiliary RAM allocated in the 8051 external RAM area 80h - FFh. The
AUXRAM is divided into six banks, selected by XBANK register. Program can initialize Ri value and use
"MOVX" instruction to access the AUXRAM.
FFh Internal RAM
7Fh Internal RAM
direct and indirect