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MTV212MS64I View Datasheet(PDF) - Myson Century Inc

Part Name
Description
Manufacturer
MTV212MS64I Datasheet PDF : 26 Pages
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MYSON
TECHNOLOGY
MTV212M64i
(Rev 0.9)
6.9 H/V SYNC Processor Register
Reg name
HVSTUS
HCNTH
HCNTL
VCNTH
VCNTL
HVCTR0
HVCTR2
HVCTR3
INTFLG
INTEN
addr
40h (r)
41h (r)
42h (r)
43h (r)
44h (r)
40h (w)
42h (w)
43h (w)
48h (r/w)
49h (w)
bit7
bit6
bit5
CVpre
Hpol
Hovf
HF13
HF7 HF6 HF5
Vovf
VF7
VF6
VF5
C1
C0 NoHins
Selft
CLPEG CLPPO
HPRchg VPRchg HPLchg
EHPR EVPR EHPL
bit4
Vpol
HF12
HF4
VF4
SelExH
STF1
CLPW2
VPLchg
EVPL
bit3
Hpre
HF11
HF3
VF11
VF3
IVHlfH
STF0
CLPW1
HFchg
EHF
bit2
Vpre
HF10
HF2
VF10
VF2
HlfHE
Rt1
CLPW0
VFchg
EVF
bit1
Hoff
HF9
HF1
VF9
VF1
HBpl
Rt0
bit0
Voff
HF8
HF0
VF8
VF0
VBpl
STE
Vsync
EVsync
HVSTUS (r) : The status of polarity, present and static level for HSYNC and VSYNC.
CVpre = 1 The extracted CVSYNC is present.
= 0 The extracted CVSYNC is not present.
Hpol = 1 HSYNC input is positive polarity.
= 0 HSYNC input is negative polarity.
Vpol = 1 VSYNC (CVSYNC) is positive polarity.
= 0 VSYNC (CVSYNC) is negative polarity.
Hpre = 1 HSYNC input is present.
= 0 HSYNC input is not present.
Vpre = 1 VSYNC input is present.
= 0 VSYNC input is not present.
Hoff* = 1 Off level of HSYNC input is high.
= 0 Off level of HSYNC input is low.
Voff* = 1 Off level of VSYNC input is high.
= 0 Off level of VSYNC input is low.
*Hoff and Voff are valid when Hpre=0 or Vpre=0.
HCNTH (r) : H-Freq counter's high bits.
Hovf = 1 H-Freq counter is overflowed, this bit is cleared by H/W when condition removed.
HF13 - HF8 : 6 high bits of H-Freq counter.
HCNTL (r) : H-Freq counter's low byte.
VCNTH (r) : V-Freq counter's high bits.
Vovf = 1 V-Freq counter is overflowed, this bit is cleared by H/W when condition removed.
VF11 - 8 :
4 high bits of V-Freq counter.
VCNTL (r) : V-Freq counter's low byte.
HVCTR0 (w) : H/V SYNC processor control register 0.
C1, C0 = 1,1 Selects CVSYNC as the polarity, freq and VBLANK source.
= 1,0 Selects VSYNC as the polarity, freq and VBLANK source.
= 0,0 Disables composite function.
= 0,1 H/W automatically switches to CVSYNC when CVpre=1 and VSpre=0.
NoHins = 1 HBLANK has no insert pulse in composite mode.
= 0 HBLANK has insert pulse in composite mode.
SelExH = 1 Input source of HLFHO is P1.0.
= 0 Input source HLFHO is HSYNC.
Revision 0.9
- 13 -
2000/11/17
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