R5F21154DSP View Datasheet(PDF) - Renesas Electronics
Part Name
Description
Manufacturer
R5F21154DSP Datasheet PDF : 277 Pages
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R8C/14 Group, R8C/15 Group
15. Clock Synchronous Serial I/O with Chip Select (SSU)
15.4 Communication Modes and Pin Functions
SSU switches functions of the I/O pin in each communication mode according to the setting of the
MSS bit in the SSCRH register and the RE and TE bits in the SSER register. Table 15.3 shows the
Association between Communication Modes and I/O Pins.
Table 15.3 Association between Communication Modes and I/O Pins
Communication Mode
Clock Synchronous
Communication Mode
Bit Setting
SSUMS BIDE MSS
TE
0
Disabled 0
0
1
1
0
1
4-Wire Bus
1
0
Communication Mode
0
0
1
1
0
1
4-Wire Bus
1
1
(Bidirectional)
Communication Mode(2)
0
0
1
1
0
1
RE
1
0
1
1
0
1
1
0
1
1
0
1
1
0
1
0
SSI
Input
−(1)
Input
Input
−(1)
Input
−(1)
Output
Output
Input
−(1)
Input
−(1)
−(1)
−(1)
−(1)
Pin State
SSO SSCK
−(1)
Input
Output Input
Output Input
−(1)
Output
Output Output
Output Output
Input Input
−(1)
Input
Input Input
−(1)
Output
Output Output
Output Output
Input Input
Output Input
Input Output
Output Output
NOTES:
1. This pin can be used as programmable I/O port.
2. Do not set both the TE and RE bits to “1” in 4-wire bus (bidirectional) communication mode.
SSUMS and BIDE : Bits in SSMR2 register
MSS : Bit in SSCRH register
TE and RE : Bits in SSER register
Rev.2.10 Jan 19, 2006 Page 153 of 253
REJ09B0164-0210
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