QL6325-E View Datasheet(PDF) - QuickLogic Corporation

Part Name

Description

Manufacturer

QL6325-E

FPGA Combining Performance, Density, and Embedded RAM

QuickLogic Corporation 

QL6325E Eclipse-E Data Sheet Rev. F

Figure 2: Eclipse-E Logic Cell

QS

A1

A2

A3

A4

AZ

A5

A6

OS

OP

B1

B2

C1

OZ

C2

MP

MS

QZ

D1

D2

E1

E2

NP

NZ

NS

Q2Z

F1

F2

F3

F4

FZ

F5

F6

PS

PP

QC

QR

RAM Modules

The QL6325E includes 24 dual-port 2,304-bit RAM modules for implementing RAM, ROM, and FIFO

functions. Each module is user-configurable into four different block organizations and can be cascaded

horizontally to increase their effective width, or vertically to increase their effective depth as shown in Figure 4.

Figure 3: 2,304-bit RAM Module

MODE[1:0] ASYNCRD

WA[9:0]

RA[9:0]

WD[17:0]

RD[17:0]

WE

RE

WCLK

RCLK

Using the two “mode” pins, designers can configure each module into 128 x 18 and 256 x 9. The blocks are

also easily cascadable to increase their effective width and/or depth (see Figure 4).

© 2005 QuickLogic Corporation

www.quicklogic.com

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