ADV7190KST 데이터 시트보기 (PDF) - Analog Devices
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ADV7190KST Datasheet PDF : 72 Pages
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ADV7190/ADV7191
Mode 0 (CCIR–656): Master Option
(Timing Register 0 TR0 = X X X X X 0 0 1)
The ADV7190/ADV7191 generates H, V, and F signals required for the SAV and EAV Time Codes in the CCIR656 standard. The H bit
is output on the HSYNC pin, the V bit is output on the BLANK pin and the F bit is output on the VSYNC pin. Mode 0 is illustrated
in Figure 34 (NTSC) and Figure 35 (PAL). The H, V, and F transitions relative to the video waveform are illustrated in Figure 36.
DISPLAY
VERTICAL BLANK
DISPLAY
522 523 524 525
1
H
2
3
4
5
6
7
8
9
10
11
V
F
DISPLAY
EVEN FIELD ODD FIELD
VERTICAL BLANK
20
21
22
DISPLAY
260 261 262 263 264 265 266 267 268 269 270 271 272 273 274
H
V
F
ODD FIELD EVEN FIELD
Figure 34. Timing Mode 0, NTSC Master Mode
DISPLAY
VERTICAL BLANK
283 284 285
DISPLAY
622
623
624
625
1
2
3
4
5
6
7
H
V
F
EVEN FIELD ODD FIELD
DISPLAY
VERTICAL BLANK
21
22
23
DISPLAY
309
310
311
312
313
314
315
316
317
318
319
320
H
V
F
ODD FIELD EVEN FIELD
Figure 35. Timing Mode 0, PAL Master Mode
334
335
336
–22–
REV. B
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