59629475808QXA View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

59629475808QXA

Enhanced SuMMIT XTE MIL-STD-1553 dual redundant bus controller/remote terminal/monitor/transceiver multichip module SMD. Lead finish gold. Class Q. Device type 09 (SuMMIT XTE 5V/12V). Radiation none.

Aeroflex UTMC 

MFT

MINOR

FRAME

#1

MFT

MINOR

FRAME

#2

MFT

MINOR

FRAME

#N

Figure 10. Major Frame Sequencing

3.4 Memory Architecture

After reviewing the SBC’s internal registers, it may be

advantageous to look at the external memory requirements and

how the host sets up memory to make the S IT a bus

controller. The intent of this section is to show one method for

defining the memory configuration.

Also, shown as a separate memory area is the Interrupt Log List

(refer to section 6.0 for a description of the Interrupt Log List).

Notice that Register 5 points to the top of the initial Log List.

After execution of the first SBC Command Block, Register 5

will automatically be updated if interrupt condition exists.

The configuration shows the Command Blocks, data locations,

and the Interrupt Log List as separate entities within memory.

Figure 11 shows that the first block of memory is allocated for

the Command Blocks. Notice that Register 8 initially points to

the control word of the first Command Block. After completing

execution of that first Command Block, Register 8 will

automatically be updated to show the address associated with

the next Command Block.

Following the Command Block locations is the memory

required for all the data words. In BC applications, the number

of data words for each Command Block is known. In figure 11

for example, the first Command Block has allocated several

memory locations for expected data. Conversely, the second

Command Block has only allocated a few memory locations.

Since the number of data words associated with each Command

Block is known, memory may be used efficiently.

48

S MMIT FAMILY

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