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5962F9211804QZX View Datasheet(PDF) - Aeroflex UTMC

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5962F9211804QZX Datasheet PDF : 177 Pages
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3.2.1 Control Word
The first memory location of each SBC Command Block contains the control word. Each control word contains the opcode, retry
number, bus definition, RT-RT instruction, condition codes, and the block access message error. The SBC’s control word is defined
below.
15
12 11
10
9
8
7
1
0
Opcode
Retry #
CHA/B
RT-RT
Condition Codes
Block Access ME
Bit
Number
15-12
11-10
9
8
7-1
0
Description
Opcode. These bits define the opcode to be used by the SBC for that particular Command Block.
If the opcode does not perform any 1553 function, all other bits are ignored. Each of the available
opcodes is defined in section 3.2.1.1.
Retry Number. These bits define the number of retries for each individual Command Block and if
a retry opcode is used. If bit 2 of the Control Register is not enabled, all retries will occur on the
programmed bus. However, if bit 2 is enabled, the first retry will always occur on the alternate bus,
the second retry will occur on the primary bus, the third retry will occur on the alternate bus, and
the fourth retry will occur on the primary bus.
BIT 11
BIT 10
# of Retries
0
1
1
1
0
2
1
1
3
0
0
4
Bus A/B. This bit defines on which of the two buses the command will be transmitted (i.e., primary
bus). (Logic 1 = Bus A, Logic 0 = Bus B).
RT-RT Transfer. This bit defines whether or not the present Command Block is a RT-RT transfer
and if the SBC should transmit the second command word. Data associated with a RT-RT is always
stored by the SBC (Logic 1 = RT-RT).
Condition Codes. These bits define the condition code the SBC uses for that particular Command
Block. Each of the available condition codes are defined in section 3.2.1.2.
Block Access Message Error. Assertion of this bit indicates a protocol message error occurred in
the RT’s response. For this occurrence, the SBC will overwrite this bit prior to storing the Control
Word into memory. Noise on the 1553 bus may be one example of such an error.
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