5962F9466311QXC View Datasheet(PDF) - Aeroflex UTMC

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5962F9466311QXC

Enhanced SuMMIT XTE MIL-STD-1553 dual redundant bus controller/remote terminal/monitor/transceiver multichip module SMD. Lead finish gold. Class Q. Device type 09 (SuMMIT XTE 5V/12V). Radiation none.

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2.5 Encoder and Decoder

The SRT interfaces directly to a transmitter/receiver via the SRT

Manchester II encoder/decoder. The SRT receives the command

word from the MIL-STD-1553 bus and processes it either by

the primary or secondary decoder. Each decoder checks for the

proper sync pulse and Manchester waveform, edge skew, correct

number of bits, and parity. If the command is a receive

command, the SRT processes each incoming data word for

correct format, word count, and contiguous data. If a message

error is detected, the SRT stops processing the remainder of the

message (i.e., DMAs), suppresses status word transmission, and

asserts bit 9 (ME bit) of the status word. The SRT will track the

message until proper word count is finished.

The SRT automatically compares the transmitted word (encoder

word) to the reflected decoder word by way of the continuous

loop-back feature. If the encoder word and reflected word do

not match, the WRAPF bit is asserted in the BIT Word Register

and the YF_INT will be generated, if enabled. In addition to the

loop-back compare test, a timer precludes a transmission greater

than 800µs by the assertion of Fail-Safe Timer (TIMERONA or

TIMERONB). This timer is reset upon receipt of another

command. Remote Terminal Response Time:

MIL-STD-1553A = 7µs

MIL-STD-1553B = 10µs

Data Contiguity Time-Out = 1.0µs

2.6 RT-RT Transfer Compare

The RT-to-RT Terminal Address compare logic ensures that the

incoming status word’s Terminal Address matches the Terminal

Address of the transmitting RT specified in the command word.

An incorrect match results in setting the message-error bit and

suppressing transmission of the status word. (RT-to-RT transfer

time-out = 55 to 59µs). The receiving SRT does not check ME

or SSYSF of the transmitting remote terminal.

2.7 Terminal Address

The SRT Terminal Address is programmed via six input pins:

RTA(4:0) and RTPTY. Negating MRST latches the SRT’s

Terminal Address from pins RTA(4:0) and parity bit RTPTY.

The address and parity cannot change until the next assertion

and negation of the MRST input (for LOCK = 0). The Terminal

Address parity is odd; input pin RTPTY is set to a logic state to

satisfy this requirement. Assertion of Operational Status

Register bit 2 (TAPF) indicates incorrect Terminal Address

parity. The Operational Status Register bit 2 is valid after the

rising edge of MRST.

For example:

RTA(4:0) = 05 (hex) = 00101 (binary)

RTPTY = 1, Sum of 1s = 3 (odd), Operational Status Register

Bit 2 = 0

RTA(4:0) = 04 (hex) = 00100 (binary)

RTPTY = 0, Sum of 1s = 1 (odd), Operational Status Register

Bit 2 = 0

RTA(4:0) = 04 (hex) = 00100 (binary)

RTPTY = 1, Sum of 1s = 2 (even), Operational Status Register

Bit 2 = 1

Note:

• The SRT checks the Terminal Address and parity after

the SRT has been started. With Broadcast disabled,

RTA(4:0)=11111 operates as a normal RT address.

• The BIT Word Register parity fail bit is valid after the

SRT has been started.

• The Terminal Address is also programmed via a write to

the Operational Status Register (LOCK = 1).The SRT

loads the Terminal Address on the completion of the

Control Register write which starts the SRT.

• YF_INT occurs if enabled.

2.8 Reset

The SµΜΜIT provides for several different reset mechanisms.

The SµΜΜIT software reset (Control Register Bit 13) is equal

to a master reset and takes 5µs to complete. Assertion of this bit

results in the immediate reset of the SRT and termination of

command processing. The host or subsystem is responsible for

the re-initialization of the SRT for operation. Configuration of

the device for auto-initialization frees the host or subsystem

from this task.

A Reset Remote Terminal mode code (Mode Code 01000, T/R

=1) is equal to a master reset only if AUTOEN is enabled. If

AUTOEN is not enabled, the reset remote terminal mode code

clears the encoder/decoders, resets the time-tag, enables the

channels to the programmed host state, and re-enables the

Terminal Flag for assertion. This reset is performed after the

transmission of the 1553 Status word. All outputs have

asynchronous reset with the following exceptions: DMACK,

DMAR, D(15:0), A(15:0), MSG_INT, RWR, RCS, and RRD.

To reset these signals, apply two clock cycles before the rising

edge of MRST.

SµMMIT FAMILY

33

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