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59629475809QXC View Datasheet(PDF) - Aeroflex UTMC

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59629475809QXC Datasheet PDF : 177 Pages
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2.2.2 Transmit Control Word
The following bits describe the transmit subaddress Descriptor Control Word. Information contained in this word assists the SRT
in message processing. The Descriptor Control Word is initialized by the host or subsystem and updated by the SRT during command
post-processing.
Bit
Number
Mnemonic
Description
15-7
N/A
Not Applicable.
6
IWA
Interrupt When Accessed. Assertion of this bit enables the generation of an interrupt when
the subaddress receives a valid command. The interrupt is entered into the Pending
Interrupt Register if not masked in the Mask Register. Output pin MSG_INT asserts after
message processing.
5
N/A
Not Applicable.
4
BAC
Block Accessed. The subsystem or host initializes this bit to zero, the SRT overwrites the
zero with a logic one upon completion of message processing. After interrogation, the
host should reset this bit to zero to observe further accesses.
3
N/A
Not Applicable.
2
A/B
Buffer A/B. Indicates the data pointer to access when buffer ping-pong is enabled. During
initialization, the host designates the first buffer used by asserting or negating this bit. A
logic one indicates buffer A; a logic zero indicates buffer B. This bit is a “don’t care” if
buffer ping-ponging is not enabled.
1
BRD
Broadcast Received. Assertion of this bit indicates the reception of a broadcast command.
0
N/A
Not Applicable.
22
SµMMIT FAMILY
 

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