59629475806QYC View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

59629475806QYC

Enhanced SuMMIT XTE MIL-STD-1553 dual redundant bus controller/remote terminal/monitor/transceiver multichip module SMD. Lead finish gold. Class Q. Device type 09 (SuMMIT XTE 5V/12V). Radiation none.

Aeroflex UTMC 

2.2 Descriptor Block

To process messages, the SRT uses data supplied in the internal

registers with data stored in external memory. The SRT accesses

a four word descriptor block stored in external memory. The

descriptor block is accessed at the beginning and end of

command processing. Multiple descriptor blocks are

sequentially entered into memory to form a descriptor table. The

following paragraphs discuss the descriptor block in detail.

The host or subsystem controlling the SRT allocates 512

consecutive memory spaces for the subaddress and mode code

descriptor table. The top of the descriptor table can reside at any

address location. Defined and entered into memory by the host,

the SRT is linked to the descriptor table via the Descriptor

Address Register contents (see figures 4a and 4b). Each

descriptor block contains a Control Word, Data Pointer A, Data

Pointer B, and Broadcast Data Pointer. Each subaddress and

mode code is assigned a descriptor for receive and transmit

commands (T/R bit equal zero or one).

Control word information allows the SRT to generate interrupts,

buffer messages, and control message processing. For a receive

command, the Data Pointer is read to determine the top of the

data buffer. The SRT stores data sequentially from the top of

data buffer plus two locations (e.g., 0100, 0101, 0102, 0103,

etc.). When processing a transmit command, the Data Pointer

is read to determine where data words are retrieved. The SRT

retrieves data words sequentially from the address the Data

Pointer designates plus two address locations.

The Broadcast Data Pointer allows for separate storage of non-

broadcast data from broadcast data per MIL-STD-1553B Notice

II. The host or subsystem enables or disables this feature via the

Control Word’s least significant bit. When disabled, the non-

broadcast and broadcast data is stored via Data List Pointer A

or B. For transmit commands, the Broadcast Data Pointer is

not used. The SRT does not transmit any information on the

receipt of a broadcast transmit command.

The SRT reads the descriptor block during command processing

(i.e., after assertion of TERACT). The SRT arbitrates for the

memory bus. After receiving control of the bus, the SRT reads

the control word and three Data Pointers. The SRT then

surrenders control of the bus back to the bus master (i.e., negates

DMACK). The SRT then begins the acquisition of data words

for either transmission or storage.

After transmission or reception, the SRT begins post-

processing. Command post-processing begins with arbitration

for the memory bus. The SRT performs a DMA burst during

post-processing. An optional interrupt log entry is performed

after a descriptor update. During the descriptor update, the SRT

modifies the Control Word index field and bits 4, 2, and 1, if

required. The SRT updates Data Pointer A if no message errors

occurred during the message transaction. Reception of a

broadcast command, with no message errors, results in the

update of the Broadcast Data Pointer. Neither Data Pointer A,

B or Broadcast is updated if the SRT has the ping-pong mode

of operation enabled.

See section 5, Enhanced SµMMIT Family Operation for

additional information.

T/R Subaddress/Mode Code

Descriptors

Address Equation

0

Subaddress

Descriptor Address Register Contents + [(SA# x 4) + 0]

1

Subaddress

Descriptor Address Register Contents + [(SA# x 4) + 128]

0

Mode Codes

Descriptor Address Register Contents + [(MC# x 4) + 256]

1

Mode Codes

Descriptor Address Register Contents + [(MC# x 4) + 384]

Figure 4a. Descriptor Table (16-Bit Data Bus)

18

SµMMIT FAMILY

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