59629475804QYA View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

59629475804QYA

Enhanced SuMMIT XTE MIL-STD-1553 dual redundant bus controller/remote terminal/monitor/transceiver multichip module SMD. Lead finish gold. Class Q. Device type 09 (SuMMIT XTE 5V/12V). Radiation none.

Aeroflex UTMC 

2.1.10 1553 Status Word Bits Register (Read/Write) - Register 9

The host or subsystem accesses this register to control the outgoing MIL-STD-1553 status word. The host or subsystem controls

the Instrumentation, Busy, Terminal Flag, Service Request, and Subsystem Flag by writing to bits 9 through 0 of this register. The

SRT’s status word response reflects assertion of these bit(s) until negated by the host or subsystem unless the Immediate Clear

Function is enabled. The Immediate Clear Function automatically clears these bits after being transmitted in a status word.

The Immediate Clear Function does not affect the operation of the Transmit Status word and Transmit Last Command word Mode

Codes. Transaction of a legal valid command with the INS bit set to a logic one and the Immediate Clear Function enabled, results

in the transmission of a status word with Bit 10 asserted. If the ensuing command is a Transmit Status word or Last Command mode

code, Bit 10 of the outgoing status word remains a logic one. For MIL-STD-1553B applications, the register is as follows:

Bit Number Mnemonic

Description

15

IMCLR

Immediate Clear Function. Assertion of this bit enables the Immediate Clear Function

(IMF) of the SRT. Enabling the IMF results in the clearing of the INS, BUSY, TF, SRQ,

and/or SUBF bit immediately after a message is completed. This function is enabled by

asserting this bit when asserting bit(s) INS, BUSY, TF, SRQ, and/or SSYSF. This bit

should be used consistently since once set, it will remain set, and once cleared, it will

remain cleared.

14-10

N/A

Not Applicable.

9

INS

Instrumentation Bit. This bit asserts the Instrumentation bit of the MIL-STD-1553B status

word. (Bit 10 of the Status Word).

8

SRQ

Service Request Bit. This bit asserts the Service Request bit of the MIL-STD-1553B status

word. (Bit 11 of the Status Word).

7-4

N/A

Not Applicable.

3

BUSY

Busy Bit. Assertion of this bit is reflected in the outgoing MIL-STD-1553B status word.

Assertion of this bit prevents memory accesses. (Bit 16 of the Status Word).

2

SSYSF

Subsystem Flag Bit. This bit asserts the Subsystem Flag bit of the MIL-STD-1553B status

word and may also be set with the SSYSF input pin. (Bit 17 of the Status Word).

1

N/A

Not Applicable.

0

TF

Terminal Flag. Assertion of this bit is reflected in the outgoing MIL-STD-1553B status

word. The SRT automatically asserts this bit if a BIT failure occurs. Inhibit Terminal Flag

mode code prevents the assertion by the host or subsystem. Override Inhibit Terminal

Flag Mode Code re-establishes the Terminal Flag option (Bit 19 of the Status Word).

14

SµMMIT FAMILY

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