EP9307-CR(2005) View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
EP9307-CR Datasheet PDF : 49 Pages
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EP9307
ARM9 SOC with Ethernet, USB, Display and Touchscreen
.
Table S. Pin Descriptions
Pin Name
TCK
TDI
TDO
TMS
TRSTn
BOOT[1:0]
XTALI
XTALO
VDD_PLL
GND_PLL
RTCXTALI
RTCXTALO
WRn
RDn
WAITn
AD[25:0]
DA[31:0]
CSn[3:0]
CSn[7:6]
DQMn[3:0]
SDCLK
SDCLKEN
SDCSn[3:0]
RASn
CASn
SDWEn
P[17:0]
SPCLK
HSYNC
V_CSYNC
BLANK
BRIGHT
PWMOUT
Xp, Xm
Yp, Ym
sXp, sXm
sYp, sYm
VDD_ADC
GND_ADC
COL[7:0]
ROW[7:0]
USBp[2:0]
USBm[2:0]
TXD0
RXD0
CTSn
DSRn
Block
Pad Pull
Type Type
Description
JTAG
JTAG
JTAG
JTAG
JTAG
System
PLL
PLL
PLL
PLL
RTC
RTC
EBUS
EBUS
EBUS
EBUS
EBUS
EBUS
EBUS
EBUS
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
SDRAM
Raster
Raster
Raster
Raster
Raster
Raster
PWM
ADC
ADC
ADC
ADC
ADC
ADC
Key
Key
USB
USB
UART1
UART1
UART1
UART1
I
I
4ma
I
I
I
A
A
P
G
A
A
4ma
4ma
I
8ma
8ma
4ma
4ma
8ma
8ma
8ma
4ma
8ma
8ma
8ma
4ma
12ma
8ma
8ma
8ma
4ma
8ma
A
A
A
A
P
G
8ma
8ma
A
A
4ma
I
I
I
PD JTAG clock in
PD JTAG data in
- JTAG data out
PD JTAG test mode select
PD JTAG reset
PD Boot mode select in
- Main oscillator input
- Main oscillator output
- Main oscillator power, 1.8V
- Main oscillator ground
- RTC oscillator input
- RTC oscillator output
- SRAM Write strobe out
- SRAM Read/OE strobe out
PU SRAM Wait in
- Shared Address bus out
PU Shared Data bus in/out
PU Chip select out
PU Chip select out
- Shared data mask out
- SDRAM clock out
- SDRAM clock enable out
- SDRAM chip selects out
- SDRAM RAS out
- SDRAM CAS out
- SDRAM write enable out
PU Pixel data bus out
PU Pixel clock in/out
PU Horizontal synchronization/ line pulse out
PU
Vertical or composite synchronization/frame
pulse out
PU Composite blanking signal out
- PWM brightness control out
Pulse width modulator output
- Touchscreen ADC X axis
- Touchscreen ADC Y axis
- Touchscreen ADC X axis feedback
- Touchscreen ADC Y axis feedback
- Touchscreen ADC power, 3.3V
- Touchscreen ADC ground
PU Key matrix column inputs
PU Key matrix row outputs
- USB positive signals
- USB negative signals
- Transmit out
PU Receive in
PU Clear to send/transmit enable
PU Data set ready/Data Carrier Detect
Table S. Pin Descriptions (Continued)
Pin Name
Block
Pad Pull
Type Type
Description
DTRn
UART1 4ma
- Data Terminal Ready output
RTSn
UART1 4ma
- Ready to send
TXD1
UART2 4ma
- Transmit/IrDA output
RXD1
UART2
I
PU Receive/IrDA input
TXD2
UART3 4ma
- Transmit
RXD2
UART3
I
PU Receive
MDC
EMAC 4ma
Management data clock
MDIO
EMAC 4ma PU Management data input/output
RXCLK
EMAC
I
PD Receive clock in
MIIRXD[3:0]
EMAC
I
PD Receive data in
RXDVAL
EMAC
I
PD Receive data valid
RXERR
EMAC
I
PD Receive data error
TXCLK
EMAC 4ma PU Transmit clock in
MIITXD[3:0]
EMAC
I
PD Transmit data out
TXEN
EMAC 4ma PD Transmit enable
TXERR
EMAC 4ma PD Transmit error
CRS
EMAC
I
PD Carrier sense
CLD
EMAC
I
PU Collision detect
GRLED
LED
12ma - Green LED
RDLED
LED
12ma - Red LED
EECLK
EEPROM 4ma PU EEPROM/Two-wire Interface clock
EEDAT
EEPROM 4ma PU EEPROM/Two-wire Interface data
ABITCLK
AC97
8ma PD AC97 bit clock
ASYNC
AC97
8ma PD AC97 frame sync
ASDI
AC97
I
PD AC97 Primary input
ASDO
AC97
8ma PU AC97 output
ARSTn
AC97
8ma
- AC97 reset
SCLK1
SPI1
8ma PD SPI bit clock
SFRM1
SPI1
8ma PD SPI Frame Clock
SSPRX1
SPI1
I
PD SPI input
SSPTX1
SPI1
8ma
- SPI output
INT[2:0]
INT
I
PD External interrupts
PRSTn
Syscon
I
PU Power on reset
RSTOn
Syscon 4ma
- User Reset in out - open drain
EGPIO[15]
GPIO I/O, 4ma PU Enhanced GPIO
EGPIO[13:0]
GPIO I/O, 4ma PU Enhanced GPIO
FGPIO[7, 5, 0] GPIO I/O, 8ma PU GPIO
GGPIO[2]
GPIO I/O, 8ma PU GPIO
HGPIO[7:2]
GPIO I/O, 8ma PU GPIO
vddc
Power
P
- Digital power, 1.8V
vddr
Power
P
- Digital power, 3.3V
gndc
Ground
G
- Digital ground
gndr
Ground
G
- Digital ground
46
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