Data Sheet
6.2.3 SPI Transfer Formats
FlashFlex51 MCU
SST89E52RD2/RD / SST89E54RD2/RD / SST89E58RD2/RD
SST89V52RD2/RD / SST89V54RD2/RD / SST89V58RD2/RD
SCK Cycle #
(for reference)
SCK (CPOL=0)
SCK (CPOL=1)
MOSI
(from Master)
MISO
(from Slave)
SS# (to Slave)
1
2
3
4
5
6
7
8
MSB 6
5
4
3
2
1
LSB
MSB
6
5
4
3
2
1
LSB
1255 F20.0
FIGURE 6-5: SPI Transfer Format with CPHA = 0
SCK Cycle #
(for reference)
SCK (CPOL=0)
SCK (CPOL=1)
MOSI
(from Master)
MISO
(from Slave)
SS# (to Slave)
1
2
3
4
5
6
7
8
MSB 6
5
4
3
2
1
LSB
MSB 6
5
4
3
2
1
LSB
1255 F21.0
FIGURE 6-6: SPI Transfer Format with CPHA = 1
©2006 Silicon Storage Technology, Inc.
44
S71255-05-000
5/06