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T89C51RD2-DDFC-L View Datasheet(PDF) - Atmel Corporation

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Atmel Corporation Atmel
T89C51RD2-DDFC-L Datasheet PDF : 86 Pages
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8. FLASH EEprom Memory
8.1. General description
The FLASH memory increases EPROM and ROM functionality with in-circuit electrical erasure and programming.
It contains 64K bytes of program memory organized in 512 pages of 128 bytes. This memory is both parallel and
serial In-System Programmable (ISP). ISP allows devices to alter their own program memory in the actual end
product under software control. A default serial loader (bootloader) program allows ISP of the FLASH.
The programming does not require 12v external programming voltage. The necessary high programming voltage
is generated on-chip using the standard VCC pins of the microcontroller.
8.2. Features
FLASH E2PROM internal program memory.
The last 1K bytes of the FLASH is used to store the low-level in-system programming routines and a default
serial loader. If the application does not need to use the ISP and does not expect to modify the FLASH content,
the Boot FLASH sector can be erased to provide access to the full 64K byte FLASH memory.
Boot vector allows user provided FLASH loader code to reside anywhere in the FLASH memory space. This
configuration provides flexibility to the user.
Default loader in Boot FLASH allows programming via the serial port without the need of a user provided loader.
Up to 64K byte external program memory if the internal program memory is disabled (EA = 0).
Programming and erase voltage with standard 5V or 3V VCC supply.
Byte-wise read (without wait state).
Byte or page erase and programming (10 ms).
Typical programming time (63K bytes) in 20 s.
Parallel programming with 87C51 compatible hardware interface to programmer.
Programmable security for the code in the FLASH.
100k write cycles
10 years data retention
8.3. FLASH Programming and Erasure
The 64K bytes FLASH is programmed by bytes or by pages of 128 bytes. It is not necessary to erase a byte or
a page before programming. The programming of a byte or a page includes a self erase before programming.
There are three methods to program the FLASH memory:
First, the on-chip ISP bootloader may be invoked which will use low level routines to program the pages. The
interface used for serial downloading of FLASH is the UART.
Second, the FLASH may be programmed or erased in the end-user application by calling low-level routines
through a common entry point in the Boot loader.
Third, the FLASH may be programmed using the parallel method by using a conventional EPROM programmer.
The parallel programming method used by these devices is similar to that used by EPROM 87C51 but it is not
identical and the commercially available programmers need to have support for the T89C51RD2.
Rev. F - 15 February, 2001
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