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T89C51RD2-DDFC-L View Datasheet(PDF) - Atmel Corporation

Part Name
Description
Manufacturer
T89C51RD2-DDFC-L
Atmel
Atmel Corporation Atmel
T89C51RD2-DDFC-L Datasheet PDF : 86 Pages
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T89C51RD2
Write to
CCAPnL Reset
Write to
CCAPnH
1
0
Enable
CF CR
CCON
CCF4 CCF3 CCF2 CCF1 CCF0 0xD8
CCAPnH
CCAPnL
16 bit comparator
Match
PCA IT
CH
CL
PCA counter/timer
RESET *
CCAPMn, n = 0 to 4
ECOMn CAPPn CAPNn MATn TOGn PWMn ECCFn
0xDA to 0xDE
CIDL WDTE
CMOD
CPS1 CPS0 ECF
0xD9
* Only for Module 4
Figure 10. PCA Compare Mode and PCA Watchdog Timer
Before enabling ECOM bit, CCAPnL and CCAPnH should be set with a non zero value, otherwise an unwanted
match could happen. Writing to CCAPnH will set the ECOM bit.
Once ECOM set, writing CCAPnL will clear ECOM so that an unwanted match doesn’t occur while modifying
the compare value. Writing to CCAPnH will set ECOM. For this reason, user software should write CCAPnL first,
and then CCAPnH. Of course, the ECOM bit can still be controlled by accessing to CCAPMn register.
6.5.3. High Speed Output Mode
In this mode the CEX output (on port 1) associated with the PCA module will toggle each time a match occurs
between the PCA counter and the module's capture registers. To activate this mode the TOG, MAT, and ECOM
bits in the module's CCAPMn SFR must be set (See Figure 11).
A prior write must be done to CCAPnL and CCAPnH before writing the ECOMn bit.
29
Rev. F - 15 February, 2001
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