Timer0 clock (This control bit is validated when the CPU clock X2 is set; when X2 is low, this bit has no effect)
Clear to select 6 clock periods per peripheral clock cycle.
Set to select 12 clock periods per peripheral clock cycle
Clear to select 12 clock periods per machine cycle (STD mode) for CPU and all the peripherals.
Set to select 6clock periods per machine cycle (X2 mode) and to enable the individual peripherals "X2" bits.
Reset Value = X000 0000b
Not bit addressable
Rev. F - 15 February, 2001