RT8167A View Datasheet(PDF) - Richtek Technology
Part Name
Description
Manufacturer
RT8167A Datasheet PDF : 40 Pages
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RT8167A
Disable GFX VR : Before EN = High
GFX VR enable or disable is determined by the internal
circuitry that monitors the ISENAN voltage during start
up. Before EN = high, GFX VR detects whether the voltage
of ISENAN is higher than “VCC − 1V” to disable GFX
VR. The unused driver pins can be connected to GND or
left floating.
GFX VR Forced-DEM Function Enable : After
VRA_Ready = High
The GFX VR's forced-DEM function can be enabled or
disabled with GFXPS2 pin. The RT8167A detects the
voltage of GFXPS2 for forced-DEM function. If the voltage
at GFXPS2 pin is higher than 4.3V, the GFX VR operates
in forced-DEM. If this voltage is lower than 0.7V, the GFX
VR follows SVID power state command.
Similar to the valley current mode control with finite
compensator gain, the high side MOSFET on-time is
determined by the CCRCOT PWM generator. When load
current increases, VCS increases, the steady state COMP
voltage also increases which makes the output voltage
decrease, thus achieving AVP.
Droop Function Enable
The CORE/GFX VR's droop function can be enabled or
disabled with DRPEN/DRPENA pin. After EN = high within
10μs, the RT8167A will source 80μA current from DRPEN/
DRPENA pin to the external resistor to determine the
voltage level. If the voltage at DRPEN/DRPENA pin is lower
than 3.5V, then the VR will operate in droop-disabled mode.
If the voltage is higher than 4V, then the VR will operate in
droop-enabled mode.
Loop Control
Both CORE and GFX VR adopt Richtek's proprietary G-
NAVPTM topology. G-NAVPTM is based on the finite-gain
valley current mode with CCRCOT (Constant Current
Ripple Constant On Time) topology. The output voltage,
VCORE or VGFX, will decrease with increasing output load
current. The control loop consists of PWM modulator with
power stage, current sense amplifier and error amplifier
as shown in Figure 8.
VIN
GFX/CORE VR
CCRCOT
PWM Generator
Driver
Logic
Control
UGATEx
PHASEx
LGATEx
CMP
High Side
MOSFET
VOUT
(VCORE/VGFX)
L
RC
Low Side
MOSFET RX
CX
C
Droop Setting (with Temperature Compensation)
It's very easy to achieve the Active Voltage Positioning
(AVP) by properly setting the error amplifier gain due to
the native droop characteristics. The target is to have
VOUT = VREFx − ILOAD x RDROOP
(1)
Then solving the switching condition VCOMPx = VCSx in
Figure 8 yields the desired error amplifier gain as
AV
=
R2
R1
=
AI × RSENSE
RDROOP
(2)
where AI is the internal current sense amplifier gain and
RSENSE is the current sense resistance. If no external sense
resistor is present, the DCR of the inductor will act as
RSENSE. RDROOP is the resistive slope value of the converter
output and is the desired static output impedance.
VCSx
+
Ai
ISENxP
-
ISENxN
CByp
C2
C1
VOUT
AV2 > AV1
COMPx
FBx
-
EA
+
RGNDx
VREFx
R2 R1
CORE/GFX VR
VSS_SENSE
CORE/GFX VR
VCC_SENSE
Figure 8. Simplified Schematic for Droop and Remote
Sense in CCM
AV2
AV1
0
Load Current
Figure 9. Error Amplifier Gain (AV) Influence on VOUT
Accuracy
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
www.richtek.com
32
is a registered trademark of Richtek Technology Corporation.
DS8167A-00 January 2012
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