RT8859M
are lower and the controller is powered from a lower voltage
supply. Low frequency operation offers the best overall
efficiency at the expense of component size and board
space. Figure 19 shows the on-time setting circuit.
CCRCOT
TONSETA RTON
R1
VIN, AXG
On-Time
Computer VDAC, AXG
C1
Connect a resistor (RTON) between VIN, GFX and TONSETA
to set the on-time of UGATE :
t ON
(VDAC
< 1.2V) =
24.4 x 10−12 x RTON
VIN − VDACGFX
(49)
where tON is the UGATE turn-on period, VIN is the input
voltage of the AXG VR, and VDAC, AXG is the DAC voltage.
When VDAC, AXG is larger than 1.2V, the equivalent switching
frequency may be too fast at over 500kHz, which is
unacceptable. Therefore, the AXG VR implements a pseudo
constant frequency technology to avoid this disadvantage
of CCRCOT topology. When VDAC, AXG is larger than 1.2V,
the on-time equation will be modified to :
t ON
(VDAC
≥ 1.2V) =
20.33
x
10−12 x RTON x VDAC, AXG
VIN − VDAC, AXG
(50)
On-Time
Figure 18. AXG VR : On-Time setting with RC Filter
Differential Remote Sense Setting
The AXG VR includes differential, remote sense inputs to
eliminate the effects of voltage drops along the PC board
traces, CPU internal power routes and socket contacts.
The CPU contains on-die sense pins VCCAXG_SENSE and
VSSAXG_SENSE. Connect the RGNDA to VSSAXG_SENSE.
Connect the FBA to VCCAXG_SENSE with a resistor to build
the negative input path of the error amplifier. The VDAC,AXG
and the precision voltage reference are referred to RGNDA
for accurate remote sensing.
Current Sense Setting
On-time translates only roughly to switching frequencies. The current sense topology of the AXG VR is continuous
The on-times guaranteed in the Electrical Characteristics inductor current sensing. Therefore, the controller can be
are influenced by switching delays in the external HS- less noise sensitive. Low offset amplifiers are used for
FET. Also, the dead-time effect increases the effective loop control and over current detection. The internal current
on-time, which in turn reduces the switching frequency. It
occurs only in CCM, and during dynamic output voltage
sense amplifier gain (AI) is fixed to be 20. The ISENAP
and ISENAN denote the positive and negative input of the
transitions when the inductor current reverses at light or current sense amplifier.
negative load currents. With reversed inductor current,
the phase go high earlier than normal, extending the on-
time by a period equal to the HS-FET rising dead time.
For better efficiency of the given load range, the maximum
switching frequency is suggested to be :
fS(MAX) (kHz)
=
tON
−
1
THS−Delay
x
Users can either use a current sense resistor or the
inductor's DCR for current sensing. Using inductor's DCR
allows higher efficiency as shown in Figure 19. Refer to
below equation for optimum transient performance :
L
DCR
=
RX
x
CX
(52)
For example, choosing L = 0.36μH with 1mΩ DCR and
VDAC(MAX) + ILOAD(MAX) x ⎡⎣RON _ LS−FET + DCR − RDROOP ⎤⎦ CX = 100nF yields :
VIN(MAX) + ILOAD(MAX) x ⎡⎣RON _ LS−FET − RON _ HS−FET ⎤⎦
(51)
RX
=
0.36μH
1mΩ × 100nF
=
3.6kΩ
(53)
VOUT, AXG
where fS(MAX) is the maximum switching frequency, tHS-
DELAY is the turn-on delay of HS-FET, VDAC(MAX) is the
L
DCR
maximum VDAC, AXG of application, VIN(MAX) is the maximum
RX
CX
application input voltage, ILOAD(MAX) is the maximum load
of application, RON_LS-FET is the Low side FET RDS(ON),
RON_HS-FET is the High side FET RDS(ON), DCR is the
ISENAP
ISENAN
+ VX -
inductor DCR, and RDROOP is the load line setting.
Figure 19. AXG VR : Lossless Inductor Sensing
Copyright ©2012 Richtek Technology Corporation. All rights reserved.
DS8859M-05 July 2012
is a registered trademark of Richtek Technology Corporation.
www.richtek.com
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