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HFA1110 View Datasheet(PDF) - Intersil

Part Name
Description
Manufacturer
HFA1110 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
HFA1110
Electrical Specifications VSUPPLY = ±5V, RL = 100, Unless Otherwise Specified (Continued)
PARAMETER
TEST CONDITIONS
TEMP (°C)
MIN
TYP
-1dB Gain Compression
100MHz
25
-
14
Reverse Gain (S12, Note 2)
TRANSIENT RESPONSE
100MHz, VOUT = 1VP-P
25
-
-60
Rise Time
Overshoot (Note 2)
VOUT = 0.5V Step
25
VOUT = 1.0V Step, Input Signal
25
Rise/Fall = 1ns
-
0.5
-
2.5
0.2% Settling Time (Note 2)
0.1% Settling Time (Note 2)
Overdrive Recovery Time
VOUT = 1V to 0V
VOUT = 1V to 0V
25
-
7
25
-
11
25
-
15
Differential Gain
Differential Phase
NOTE:
3.58MHz, RL = 75
3.58MHz, RL = 75
25
-
0.04
25
-
0.025
2. See Typical Performance Curves for more information.
MAX
-
-
-
-
-
-
-
-
-
UNITS
dBm
dB
ns
%
ns
ns
ns
%
°
Application Information
PC Board Layout
The frequency performance of this amplifier depends a great
deal on the amount of care taken in designing the PC board.
The use of low inductance components such as chip
resistors and chip capacitors is strongly recommended,
while a solid ground plane is a must!
Attention should be given to decoupling the power supplies.
A large value (10µF) tantalum in parallel with a small value
chip (0.1µF) capacitor works well in most cases.
Terminated microstrip signal lines are recommended at the
input and output of the device. Output capacitance, such as
that resulting from an improperly terminated transmission
line will degrade the frequency response of the amplifier and
may cause oscillations. In most cases, the oscillation can be
avoided by placing a resistor (RS) in series with the output.
See the “Recommended RS vs Load Capacitance” graph for
specific recommendations.
An example of a good high frequency layout is the
Evaluation Board shown below.
Evaluation Board
An evaluation board is available for the HFA1110 (part
number HFA1110EVAL). Please contact your local sales
office for information.
The layout and schematic of the board are shown here:
NOTE: The SOIC version may be evaluated in the DIP board by
using a SOIC-to-DIP adapter such as Aries Electronics Part Number
08-350000-10.
+5V
0.1µF
IN
50
1
8
10µF 2
7
RS
HFA1110
3
6
OUT
4
50
5
10µF
-5V
0.1µF
SCHEMATIC DIAGRAM
BOTTOM LAYOUT
TOP LAYOUT
1
3
FN2944.8
June 6, 2006
 

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