MCP6141 View Datasheet(PDF) - Microchip Technology
Part Name
Description
Manufacturer
MCP6141 Datasheet PDF : 38 Pages
| |||
MCP6141/2/3/4
4.6 Supply Bypass
With this family of operational amplifiers, the power
supply pin (VDD for single supply) should have a local
bypass capacitor (i.e., 0.01 µF to 0.1 µF) within 2 mm
for good high frequency performance. It can use a bulk
capacitor (i.e., 1 µF or larger) within 100 mm to provide
large, slow currents. This bulk capacitor is not required
for most applications and can be shared with other
nearby analog parts.
4.7 Unused Op Amps
An unused op amp in a quad package (MCP6144)
should be configured as shown in Figure 4-8. These
circuits prevent the output from toggling and causing
crosstalk.
Circuits A sets the op amp near its minimum noise gain.
The resistor divider produces any desired reference
voltage within the output voltage range of the op amp;
the op amp buffers that reference voltage. Circuit B
uses the minimum number of components and
operates as a comparator, but it may draw more
current.
¼ MCP6144 (A)
VDD
R1
VDD
¼ MCP6144 (B)
VDD
Guard Ring VIN– VIN+
FIGURE 4-9:
Example Guard Ring Layout
for Inverting Gain.
1. Non-inverting Gain and Unity Gain Buffer:
a) Connect the non-inverting pin (VIN+) to the
input with a wire that does not touch the
PCB surface.
b) Connect the guard ring to the inverting input
pin (VIN–). This biases the guard ring to the
common mode input voltage.
2. Inverting Gain and Transimpedance Gain
(convert current to voltage, such as photo
detectors) amplifiers:
a) Connect the guard ring to the non-inverting
input pin (VIN+). This biases the guard ring
to the same reference voltage as the op
amp (e.g., VDD/2 or ground).
b) Connect the inverting pin (VIN–) to the input
with a wire that does not touch the PCB
surface.
R 10R
VREF
R2
VREF
=
VDD
⋅
-------R----2---------
R1 + R2
FIGURE 4-8:
Unused Op Amps.
4.8 PCB Surface Leakage
In applications where low input bias current is critical,
printed circuit board (PCB) surface leakage effects
need to be considered. Surface leakage is caused by
humidity, dust or other contamination on the board.
Under low humidity conditions, a typical resistance
between nearby traces is 1012Ω. A 5V difference would
cause 5 pA of current to flow, which is greater than the
MCP6141/2/3/4 family’s bias current at +25°C (1 pA,
typical).
The easiest way to reduce surface leakage is to use a
guard ring around sensitive pins (or traces). The guard
ring is biased at the same voltage as the sensitive pin.
An example of this type of layout is shown in
Figure 4-9.
DS21668D-page 18
© 2009 Microchip Technology Inc.
|
|
Share Link: 