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MCP6141 View Datasheet(PDF) - Microchip Technology

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MCP6141 Datasheet PDF : 38 Pages
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Figure 4-5 shows three example circuits that are
unstable when used with the MCP6141/2/3/4 family.
The unity gain buffer and low gain amplifier
(non-inverting or inverting) are at gains that are too low
for stability (see Equation 4-2).The Miller integrator’s
capacitor makes it reach unity gain at high frequencies,
causing instability.
Note:
The three circuits shown in Figure 4-5 are
not to be used with the MCP6141/2/3/4 op
amps. They are included for illustrative
purposes only.
Unity Gain Buffer
MCP614X
VIN
Low Gain Amplifier
RG
RF
V1
VOUT
VOUT
RN
MCP614X
V2
1 + -R----F- < 10
RG
Miller Integrator
R
VIN
C
MCP614X
VOUT
FIGURE 4-5:
Examples of Unstable
Circuits for the MCP6141/2/3/4 Family.
4.4.2 CAPACITIVE LOADS
Driving large capacitive loads can cause stability
problems for voltage feedback op amps. As the load
capacitance increases, the feedback loop’s phase
margin decreases and the closed-loop bandwidth is
reduced. This produces gain peaking in the frequency
response, with overshoot and ringing in the step
response. A unity gain buffer (G = +1) is the most
sensitive to capacitive loads, though all gains show the
same general behavior.
MCP6141/2/3/4
When driving large capacitive loads with these op
amps (e.g., > 60 pF when G = +10), a small series
resistor at the output (RISO in Figure 4-6) improves the
feedback loop’s phase margin (stability) by making the
output load resistive at higher frequencies. The
bandwidth will be generally lower than the bandwidth
with no capacitive load.
RG
RF
VA
MCP614X
VB
RISO
CL
VOUT
FIGURE 4-6:
Output Resistor, RISO
stabilizes large capacitive loads.
Figure 4-7 gives recommended RISO values for
different capacitive loads and gains. The x-axis is the
normalized load capacitance (CL/GN), where GN is the
circuit’s noise gain. For non-inverting gains, GN and the
Signal Gain are equal. For inverting gains, GN is
1 + |Signal Gain| (e.g., -9 V/V gives GN = +10 V/V).
1001,00k0
10,0100k
GN = +10
GN = +20
GN +50
1,010k0
1.E1+p00
1.1E0+p01
11.E0+00p2
1.E1+n03
Normalized Load Capacitance; CL/GN (F)
FIGURE 4-7:
Recommended RISO Values
for Capacitive Loads.
After selecting RISO for your circuit, double check the
resulting frequency response peaking and step
response overshoot. Modify RISO’s value until the
response is reasonable. Bench evaluation and
simulations with the MCP6141/2/3/4 SPICE macro
model are helpful.
4.5 MCP6143 Chip Select
The MCP6143 is a single op amp with Chip Select
(CS). When CS is pulled high, the supply current drops
to 50 nA (typical) and flows through the CS pin to VSS.
When this happens, the amplifier output is put into a
high impedance state. By pulling CS low, the amplifier
is enabled. If the CS pin is left floating, the amplifier will
not operate properly. Figure 1-1 shows the output
voltage and supply current response to a CS pulse.
© 2009 Microchip Technology Inc.
DS21668D-page 17
 

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