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K4S56163LC View Datasheet(PDF) - Samsung

Part Name
Description
Manufacturer
K4S56163LC
Samsung
Samsung Samsung
K4S56163LC Datasheet PDF : 8 Pages
1 2 3 4 5 6 7 8
K4S56163LC-R(B)F/R
CMOS SDRAM
Package Dimension and Pin Configuration
< Bottom View*1 >
< Top View*2 >
E1
987 6 54 3 21
A
B
C
D
E
F
G
H
J
54Ball(6x9) CSP
1
2
3
7
8
9
A
VSS DQ15 VSSQ VDDQ DQ0 VDD
B DQ14 DQ13 VDDQ VSSQ DQ2 DQ1
C DQ12 DQ11 VSSQ VDDQ DQ4 DQ3
D DQ10 DQ9 VDDQ VSSQ DQ6 DQ5
E
DQ8 NC VSS VDD LDQM DQ7
F UDQM CLK CKE CAS RAS WE
G A12 A11 A9 BA0 BA1 CS
H
A8
A7
A6
A0
A1 A10
J
VS S
A5
A4
A3
A2 VDD
E
E/2
*2: Top View
Max. 0.20
A
A1
Encapsulant
bz
*1: Bottom View
< Top View*2 >
#A1 Ball Origin Indicator
Pin Name
CLK
CS
CKE
A0 ~ A 12
BA0 ~ BA1
RAS
CAS
WE
L(U)DQM
D Q0 ~ 15
VDD /VSS
VD D Q /V S S Q
Pin Function
System Clock
Chip Select
Clock Enable
Address
Bank Select Address
Row Address Strobe
Column Address Strobe
Write Enable
Data Input/Output Mask
Data Input/Output
Power Supply/Ground
Data Output Power/Ground
Symbol
Min
A
0.90
A1
0.30
E
-
E1
-
D
-
D1
-
e
-
b
0.40
z
-
Typ
0.95
0.35
8.10
6.40
15.10
6.40
0.80
0.45
-
[Unit:mm]
Max
1.00
0.40
-
-
-
-
-
0.50
0.10
Rev. 1.4 Dec. 2002
 

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