+3V/+5V, 13-Bit, Serial Voltage-Output DACs
with Internal Reference
Settling Time
The settling time is the amount of time required from the
start of a transition until the DAC output settles to its new
output value within the converter’s specified accuracy.
Digital Feedthrough
Digital feedthrough is noise generated on the DAC’s
output when any digital input transitions. Proper board
layout and grounding will significantly reduce this
noise, but there will always be some feedthrough
caused by the DAC itself.
Unipolar Output
Figure 9 shows the MAX5130/MAX5131 setup for
unipolar, Rail-to-Rail® operation with a gain of
1.6384V/V. With its +2.5V internal reference, the
MAX5130 can generate a unipolar output range of 0 to
+4.0955V. The MAX5131 produces a range of 0 to
+2.04775V with its on-board +1.25V reference. Table 5
lists example codes for unipolar output voltages. An off-
set to the output voltage can be achieved by simply
connecting the appropriate voltage to the OS pin, as
shown in Figure 10.
Bipolar Output
The MAX5130/MAX5131 can be configured for unity-
gain bipolar operation (OS = OUT) using the circuit
shown in Figure 11. The output voltage VOUT is thereby
given by the following equation:
VOUT = VREF · [ {G · (NB / 8192)} - 1]
where NB is the numeric value of the DAC’s binary
input code, VREF is the voltage of the internal (or exter-
nal) precision reference, and G is the overall gain. The
application circuit in Figure 11 uses a low-cost opera-
tional amplifier (MAX4162) external to the MAX5130/
MAX5131 in a unity-gain configuration. This provides
an overall circuit gain of 2V/V. Table 6 lists example
codes for bipolar output voltages.
Reset (RSTVAL) and Clear (CLR) Functions
The MAX5130/MAX5131 DACs offer a clear pin (CLR),
which resets the output to a certain value, depending
upon how RSTVAL is set. RSTVAL = DGND sets the
output to 0, and RSTVAL = VDD sets the output to mid-
scale when CLR is pulled low.
The CLR pin has a minimum input resistance of 40kΩ in
series with a diode to the supply voltage (VDD). If the
digital voltage is higher than the supply voltage for the
part, a small input current may flow, but this current will
be limited to (V CLR - VDD - 0.5V) / 40kΩ.
Note: Clearing the DAC will also cause the part to exit
software shutdown (PD = 0).
Rail-to-Rail is a registered trademark of Nippon Motorola, Ltd.
REF
MAX5130
MAX5131
DAC
+5V/+3V
VDD
R
0.6384R
OS
OUT
AGND
GAIN = 1.638V/V
DGND
Figure 9. Unipolar Output Circuit (OS = AGND) Using Internal
(+1.25V/+2.5V) or External Reference. With external reference,
pull REFADJ to VDD.
REF
REFADJ
MAX5130
MAX5131
DAC
+5V/+3V
VDD
R
0.6384R
OS
+
VOS
OUT
AGND
DGND
Figure 10. Circuit for Adding Offset to the DAC’s Output
+5V/+3V
50k
REF
OS
VDD
MAX5130
MAX5131
R
0.6384R
DAC
OUT
DGND AGND
50k
V+
VOUT
MAX4162
V-
Figure 11. Unity-Gain Bipolar Output Circuit Using Internal
(+1.25V/+2.5V) or External Reference. With external reference,
pull REFADJ to VDD.
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