AD8306–SPECIFICATIONS (VS = +5 V, TA = +25؇C, f = 10 MHz, unless otherwise noted)
Parameter
Conditions
Min1
Typ
Max1 Units
INPUT STAGE
Maximum Input2
Equivalent Power in 50 Ω
Noise Floor
Equivalent Power in 50 Ω
Input Resistance
Input Capacitance
DC Bias Voltage
(Inputs INHI, INLO)
Differential Drive, p-p
Terminated in 52.3 ΩʈRIN
Terminated 50 Ω Source
400 MHz Bandwidth
From INHI to INLO
From INHI to INLO
Either Input
± 3.5
±4
V
+9
dBV
+22
dBm
1.28
nV/√Hz
–78
dBm
800
1000
1200 Ω
2.5
pF
1.725
V
LIMITING AMPLIFIER
Usable Frequency Range
At Limiter Output
Phase Variation at 100 MHz
Limiter Output Current
Versus Temperature
Input Range3
Maximum Output Voltage
Rise/Fall Time (10%–90%)
LOGARITHMIC AMPLIFIER
± 3 dB Error Dynamic Range
Transfer Slope4
Over Temperature
Intercept (Log Offset)4
Over Temperature
Temperature Sensitivity
Linearity Error (Ripple)
Output Voltage
Minimum Load Resistance, RL
Maximum Sink Current
Output Resistance
Small-Signal Bandwidth
Output Settling Time to 2%
Rise/Fall Time (10%–90%)
POWER INTERFACES
Supply Voltage, VS
Quiescent Current
Over Temperature
Disable Current
Additional Bias for Limiter
Logic Level to Enable Power
Input Current when HI
Logic Level to Disable Power
TRANSISTOR COUNT
(Outputs LMHI, LMLO)
RLOAD = RLIM = 50 Ω, to –10 dB Point
Over Input Range –73 dBV to –3 dBV
Nominally 400 mV/RLIM
–40°C ≤ TA ≤ +85°C
At Either LMHI or LMLO, wrt VPS2
RLOAD = 50 Ω, 40 Ω ≤ RLIM ≤ 400 Ω
(Output VLOG)
From Noise Floor to Maximum Input
f = 10 MHz
f = 100 MHz
–40°C < TA < +85°C
f = 10 MHz
f = 100 MHz
–40°C ≤ TA ≤ +85°C
Input from –80 dBV to +0 dBV
Input = –91 dBV, VS = +5 V, +2.7 V
Input = +9 dBV, VS = +5 V
Input = –3 dBV, VS = +3 V
To Ground
Large Scale Input, +3 dBV, RL ≥␣ 50 Ω, CL ≤␣ 100 pF
Large Scale Input, +3 dBV, RL ≥␣ 50 Ω, CL ≤␣ 100 pF
Zero-Signal, LMDR Open
–40°C < TA < +85°C
–40°C < TA < +85°C
RLIM = 400 Ω (See Text)
HI Condition, –40°C < TA < +85°C
3 V at ENBL, –40°C < TA < +85°C
LO Condition, –40°C < TA < +85°C
# of Transistors
5
0
–78
1
19.5
19.3
–109.5
–111
40
0.75
2.7
13
11
2.7
–0.5
585
±2
1
–0.008
1.25
0.6
100
20
19.6
20
–108
–108.4
–108
–0.009
± 0.4
0.34
2.34
2.10
50
1.0
0.3
3.5
120
73
5
16
16
0.01
2.0
40
1
207
400 MHz
MHz
Degrees
10
mA
%/°C
+9
dBV
V
ns
20.5
20.7
–106.5
–105
2.75
1.25
220
100
dB
mV/dB
mV/dB
mV/dB
dBV
dBV
dBV
dB/°C
dB
V
V
V
Ω
mA
Ω
MHz
ns
ns
6.5 V
20
mA
23
mA
4
µA
2.25 mA
VS
V
60
µA
V
207
NOTES
1Minimum and maximum specified limits on parameters that are guaranteed but not tested are six sigma values.
2The input level is specified in “dBV” since logarithmic amplifiers respond strictly to voltage, not power. 0 dBV corresponds to a sinusoidal single-frequency input of
1 V rms. A power level of 0 dBm (1 mW) in a 50 Ω termination corresponds to an input of 0.2236 V rms. Hence, in the special case of 50 Ω termination, dBV values
can be converted into dBm by adding a fixed offset of +13 to the dBV rms value.
3Due to the extremely high Gain Bandwidth Product of the AD8306, the output of either LMHI or LMLO will be unstable for levels below –78 dBV (–65 dBm, re 50 Ω).
4Standard deviation remains essentially constant over frequency. See Figures 13, 14, 16 and 17.
Specifications subject to change without notice.
–2–
REV. A