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FIN3386 View Datasheet(PDF) - Fairchild Semiconductor

Part Name
Description
Manufacturer
FIN3386 Datasheet PDF : 21 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Receiver Pin Configuration
Figure 4. FIN3386 (28:4 Receiver) Pin Assignments
Pin Definitions
Pin Names I/O Types
RxIn
I
RxIn+
I
RxCLKIn-
I
RxCLKIn+
I
RxOut
O
RxCLKOut-
O
/PwrDn
I
PLL VCC
I
PLL GND
I
LVDS VCC
I
LVDS GND
I
VCC
I
GND
I
© 2003 Fairchild Semiconductor Corporation
FIN3385 / FIN3386 • Rev. 1.0.6
Number of Pins
4/3
4/3
1
1
28/21
1
1
1
2
1
3
4
5
Description of Signals
Negative LVDS Differential Data Output
Positive LVDS Differential Data Output
Negative LVDS Differential Data Input
Positive LVDS Differential Clock Input
LVTTL Level Data Output, goes HIGH for /PwrDn LOW
LVTTL Clock Output
LVTTL Level Input. Refer to Table 2
Power Supply Pin for PLL
Ground Pins for PLL
Power Supply Pin for LVDS Input
Ground Pins for LVDS Input
Power Supply for LVTTL Output
Ground Pins for LVTTL Output
www.fairchildsemi.com
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