EP7312-IB View Datasheet(PDF) - Cirrus Logic
Part Name
Description
Manufacturer
EP7312-IB Datasheet PDF : 64 Pages
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Ball Location
Name
J2
PA[5]
J3
PA[6]
J18
A[11]
J19
D[13]
J20
A[13]/DRA[14]
K1
PA[1]
K2
PA[2]
K3
VDDIO
K18
D[14]
K19
A[14]/DRA[13]
K20
D[15]
L1
TXD[1]
L2
LEDDRV
L3
PA[3]
L18
VDDIO
L19
D[16]
L20
A[16]/DRA[11]
M1
RXD[1]
M2
CTS
M3
PA[0]
M18
A[15]/DRA[12]
M19
A[17]/DRA[10]
M20
nTRST
N1
DSR
N2
nTEST[1]
N3
PHDIN
N18
D[17]
N19
D[19]
N20
A[18]/DRA[9]
P1
EINT[3]
P2
nEINT[2]
P3
DCD
P18
D[18]
P19
A[20]/DRA[7]
DS508F1
EP7312
High-Performance, Low-Power System on Chip
Table 21. 204-Ball TFBGA Ball Listing (Continued)
Strength†
1
1
1
1
1
1
1
Reset
State
Input‡
‡
Input
Low
Low
Low
‡
Input
‡
Input
1
Low
1
Low
1
Low
1
High
1
Low
1
‡
Input
1
Low
1
Low
1
‡
Input
1
Low
1
Low
With p/u*
1
Low
1
Low
1
Low
1
Low
1
Low
Type
I/O
I/O
O
I/O
O
I/O
I/O
Pad power
I/O
O
I/O
O
O
I/O
Pad power
I/O
O
I
I
I/O
O
O
I
I
I
I
I/O
I/O
O
I
I
I
I/O
O
Description
GPIO port A
GPIO port A
System byte address
Data I/O
System byte address / SDRAM address
GPIO port A
GPIO port A
Digital I/O power, 3.3V
Data I/O
System byte address / SDRAM address
Data I/O
UART 1 transmit data out
IR LED drive
GPIO port A
Digital I/O power, 3.3V
Data I/O
System byte address / SDRAM address
UART 1 receive data input
UART 1 clear to send input
GPIO port A
System byte address / SDRAM address
System byte address / SDRAM address
JTAG async reset input
UART 1 data set ready input
Test mode select input
Photodiode input
Data I/O
Data I/O
System byte address / SDRAM address
External interrupt
External interrupt input
UART 1 data carrier detect
Data I/O
System byte address / SDRAM address
©Copyright Cirrus Logic, Inc. 2005
(All Rights Reserved)
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