C8051F040/1/2/3/4/5/6/7
18. Controller Area Network (CAN0)
Table 18.1. Background System Information ........................................................ 229
Table 18.2. CAN Register Index and Reset Values .............................................. 233
19. System Management BUS/I2C BUS (SMBUS0)
Table 19.1. SMB0STA Status Codes and States .................................................. 252
20. Enhanced Serial Peripheral Interface (SPI0)
21. UART0
Table 21.1. UART0 Modes .................................................................................... 266
Table 21.2. Oscillator Frequencies for Standard Baud Rates ............................... 273
22. UART1
Table 22.1. Timer Settings for Standard Baud Rates Using the Internal 24.5 MHz Os-
cillator ................................................................................................. 284
Table 22.2. Timer Settings for Standard Baud Rates Using an External 25.0 MHz Os-
cillator ................................................................................................. 284
Table 22.3. Timer Settings for Standard Baud Rates Using an External 22.1184 MHz
Oscillator ............................................................................................. 285
Table 22.4. Timer Settings for Standard Baud Rates Using an External 18.432 MHz
Oscillator ............................................................................................. 286
Table 22.5. Timer Settings for Standard Baud Rates Using an External 11.0592 MHz
Oscillator ............................................................................................. 287
Table 22.6. Timer Settings for Standard Baud Rates Using an External 3.6864 MHz
Oscillator ............................................................................................. 288
23. Timers
24. Programmable Counter Array
Table 24.1. PCA Timebase Input Options ............................................................. 306
Table 24.2. PCA0CPM Register Settings for PCA Capture/Compare Modules .... 307
25. JTAG (IEEE 1149.1)
Table 25.1. Boundary Data Register Bit Definitions .............................................. 320
14
Rev. 1.6