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ADP1196 View Datasheet(PDF) - Analog Devices

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ADP1196 Datasheet PDF : 12 Pages
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Data Sheet
THEORY OF OPERATION
VIN
VIN
GND
VB_EN
VOUT
VOUT
SUPPLY SWITCH
ENABLE LOGIC
CHARGE PUMP,
OVERCURRENT,
AND SLEW RATE
CONTROL
OVERTEMPERATURE
PROTECTION
Figure 21. Functional Block Diagram
The ADP1196 is a high-side or low-side N-channel metal oxide
semiconductor (NMOS) load switch that is controlled by an
internal charge pump. The ADP1196 operates with voltages
from 1.83 V to 5.5 V on either VIN or VB_EN.
Internal circuitry monitors the VIN and VB_EN pins, connecting
the internal power supply to the higher of the two voltages. This
operation allows the NMOS load switch to operate on the low
side of a particular load.
An internal charge pump biases the NMOS switch to achieve a
relatively constant, ultralow on resistance of 10 mΩ across the
entire supply range. The use of the internal charge pump also
allows for controlled turn-on times. Turning the NMOS switch
on and off is controlled by the enable input, VB_EN, which can
interface directly with 1.83 V logic signals when VIN is greater
than 1.8 V.
ADP1196
The ADP1196 supports 3 A of continuous current as long as TA is
less than or equal to 70°C. At 85°C, the derated load current falls to
±2.22 A.
The overtemperature protection circuit is activated if the load
current causes the junction temperature to exceed 125°C. When
this occurs, the overtemperature protection circuitry disables the
output until the junction temperature falls below approximately
110°C, at which point the output is reenabled. If the fault condition
persists, the output cycles off and on until the fault is removed.
ESD protection structures are shown in the block diagram as
Zener diodes (see Figure 21).
The ADP1196 is a low quiescent current device with a nominal
4 MΩ pull-down resistor on its enable pin (VB_EN). The package
is a space-saving 1.0 mm × 1.5 mm, 6-ball WLCSP.
Rev. B | Page 9 of 12
 

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