Data Sheet
AD5781
Table 9. Hardware Control Pins Truth Table
LDAC CLR
RESET Function
X1
X1
0
The AD5781 is in reset mode. The device cannot be programmed.
X1
X1
The AD5781 is returned to its power-on state. All registers are set to their default values.
0
0
1
The DAC register is loaded with the clearcode register value, and the output is set accordingly.
0
1
1
The output is set according to the DAC register value.
1
0
1
The DAC register is loaded with the clearcode register value, and the output is set accordingly.
1
1
The output is set according to the DAC register value.
0
1
The output remains at the clear code value.
1
1
The output remains set according to the DAC register value.
0
1
The output remains at the clear code value.
1
1
The DAC register is loaded with the clearcode register value and the output is set accordingly.
0
1
The DAC register is loaded with the clearcode register value and the output is set accordingly.
1
1
The output remains at the clear code value.
0
1
The output is set according to the DAC register value.
1 X is don’t care.
ON-CHIP REGISTERS
DAC Register
Table 10 outlines how data is written to and read from the DAC register.
Table 10. DAC Register
MSB
DB23
DB22
R/W
R/W
0
DB21
DB20
Register address
0
1
DB19
DB2
DAC register data
18-bits of data
LSB
DB1
DB0
X1
X1
1 X is don’t care.
The following equation describes the ideal transfer function of the DAC:
( ) VOUT =
VREFP − VREFN
218 − 1
× D + VREFN
where:
VREFN is the negative voltage applied at the VREFNS input pin.
VREFP is the positive voltage applied at the VREFPS input pin.
D is the 18-bit code programmed to the DAC.
Rev. E | Page 21 of 27