PC48F2P0VTQ0 查看數據表（PDF） - Intel
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PC48F2P0VTQ0 Datasheet PDF : 102 Pages
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1-Gbit P30 Family
Figure 37. Write State Machine—Next State Table (Sheet 4 of 6)
Command Input to Chip and resulting Chip Next State
Current Chip
State (7)
Setup
OTP
Setup (4)
Lock
Block
Confirm (8)
Lock-Down
Block
Confirm (8)
Write RCR
Confirm (8)
Block Address
(?WA0) 9
Illegal Cmds or
BEFP Data (1)
WSM
Operation
Completes
(C0H)
(01H)
(2FH)
(03H)
(XXXXH)
(all other codes)
Word Program Busy in Erase Suspend
NA
Word
Program in
Erase
Suspend
Busy
Suspend
Word Program Busy in Erase Suspend Busy
Word Program Suspend in Erase Suspend
Erase Suspend
N/A
Setup
BP Load 1
BP Load 1
BP Load 2
Ready (BP Load 2 BP Load 2
BP Confirm if
BP Confirm if Data load into Program Buffer is
BP Load 2
complete; Else BP Load 2
Data load into
Ready
Program Buffer is
N/A
complete; Else
BP Load 2
BP in Erase
Suspend
BP
Confirm
Ready (Error in Erase Suspend)
Ready (Error)
(Proceed if
unlocked or lock
error)
Ready (Error)
BP Busy
BP Busy in Erase Suspend
Erase Suspend
BP
Suspend
BP Suspend in Erase Suspend
Lock/CR Setup in Erase
Suspend
Erase
Suspend
(Lock
Error)
Erase
Suspend
(Lock
Block)
Erase
Suspend
(Lock Down
Block)
Erase
Suspend
(Set CR)
Erase Suspend (Lock Error)
Buffered
Enhanced
Factory
Program
Mode
Setup
Ready (Error)
Ready (BEFP
Loading Data)
BEFP
Busy
BEFP Program and Verify Busy (if Block Address
given matches address given on BEFP Setup
command). Commands treated as data. (7)
Ready
Ready (Error)
BEFP Busy
N/A
Ready
Datasheet
Intel StrataFlash® Embedded Memory (P30)
Order Number: 306666, Revision: 001
April 2005
81
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