MAX6746 View Datasheet(PDF) - Maxim Integrated
Part Name
Description
Manufacturer
MAX6746 Datasheet PDF : 14 Pages
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µP Reset Circuits with Capacitor-Adjustable
Reset/Watchdog Timeout Delay
tWDI < tWD1 (MIN)
WDI
RESET
(a) FAST FAULT
tWDI > tWD2 (MAX)
5V
VCC
MAX6747
MAX6749
MAX6451
MAX6753
RESET
N
GND
100kΩ
3.3V
VCC
RESET µP
GND
WDI
RESET
(b) SLOW FAULT
tWD1 (MAX) < tWDI < tWD2 (MIN)
WDI
RESET
(c) NORMAL OPERATION (NO PULSING, OUTPUT STAYS HIGH)
Figure 5. MAX6752/MAX6753 Window Watchdog Diagram
Applications Information
Selecting Reset/Watchdog
Timeout Capacitor
The reset timeout period is adjustable to accommodate
a variety of µP applications. Adjust the reset timeout
period (tRP) by connecting a capacitor (CSRT) between
SRT and ground. Calculate the reset timeout capacitor
as folllows:
CSRT = tRP / (5.06 x 106),
with tRP in seconds and CSRT in Farads.
The watchdog timeout period is adjustable to accom-
modate a variety of µP applications. With this feature,
the watchdog timeout can be optimized for software
execution. The programmer can determine how often
the watchdog timer should be serviced. Adjust the
watchdog timeout period (tWD) by connecting a specif-
ic value capacitor (CSWT) between SWT and GND. For
Figure 6. Interfacing to Other Voltage Levels
normal mode operation, calculate the watchdog time-
out capacitor as follows:
CSWT = tWD/(5.06 x 106),
with tRP in seconds and CSRT in Farads.
For the MAX6752 and MAX6753 windowed watchdog
function, calculate the slow watchdog period, tWD2 as
follows:
tWD2 = 0.65 x 109 x CSWT
CSRT and CSWT must be a low-leakage (<10nA) type
capacitor. Ceramic capacitors are recommended.
Transient Immunity
In addition to issuing a reset to the µP during power-up,
power-down, and brownout conditions, these supervi-
sors are relatively immune to short-duration supply tran-
sients (glitches). The Maximum Transient Duration vs.
Reset Threshold Overdrive graph in the Typical
Operating Characteristics shows this relationship.
The area below the curves of the graph is the region
in which these devices typically do not generate a reset
pulse. This graph was generated using a falling pulse
applied to VCC , starting above the actual reset threshold
(VTH) and ending below it by the magnitude indicated
(reset-threshold overdrive). As the magnitude of the tran-
sient increases (farther below the reset threshold), the
maximum allowable pulse width decreases. Typically, a
VCC transient that goes 100mV below the reset threshold
and lasts 50µs or less does not cause a reset pulse to be
issued.
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