TAS5706A is Not Recommended for New Designs
SLOS606D – MARCH 2009 – REVISED SEPTEMBER 2009............................................................................................................................................. www.ti.com
The TAS5706A uses an approach called bank switching together with automatic sample-rate detection. All
processing features that must be changed for different sample rates are stored internally in the TAS5706A. The
TAS5706A has three full banks storing information, one for 32 kHz, one for 44.1/48 kHz, and one for all other
data rates. Combined with the clock-rate autodetection feature, bank switching allows the TAS5706A to detect
automatically a change in the input sample rate and switch to the appropriate bank without any MCU
The TAS5706A supports three banks of coefficients to be updated during the initialization. One bank is for 32
kHz , a second bank is for 44.1/48 kHz, and a third bank is for all other sample rates. An external controller
updates the three banks (see the I2C register mapping table for bankable locations) during the initialization
If the autobank switch is enabled (register 0x50, bits 2:0) , then the TAS5706A automatically swaps the
coefficients for subsequent sample rate changes, avoiding the need for any external controller intervention for a
sample rate change.
By default, bits 2:0 have the value 000; that means the bank switch is disabled. In that state, any update to
locations 0x29–0x3F go into the DAP. A write to register 0x50 with bits 2:0 being 001, 010, or 011 brings the
system into the coefficient-bank-update state update bank1, update bank2, or update bank3, respectively. Any
subsequent write to locations 0x29-0x3F updates the coefficient banks stored outside the DAP. After updating all
the three banks, the system controller should issue a write to register 0x50 with bits 2:0 being 100; this changes
the system state to automatic bank update. In automatic bank update, the TAS5706A automatically swaps banks
based on the sample rate.
In the headphone mode, speaker equalization and DRC are disabled, and they are restored upon returning to the
Command sequences for initialization can be summarized as follows:
1. Enable factory trim for internal oscillator: Write to register 0x1B with a value 0x00.
2. Update coefficients: Coefficients can be loaded into DAP RAM using the manual bank mode.
Use automatic bank mode.
a. Enable bank-1 mode: Write to register 0x50 with 0x01. Load the 32-kHz coefficients. TI ALE
can generate coefficients.
b. Enable bank-2 mode: Write to register 0x50 with 0x02. Load the 48-kHz coefficients.
c. Enable bank-3 mode: Write to register 0x50 with 0x03. Load the other coefficients.
d. Enable automatic bank switching by writing to register 0x50 with 0x04.
3. Bring the system out of all-channel shutdown: Write 0 to bit 6 of register 0x05.
4. Issue master volume: Write to register 0x07 with the volume value (0 db = 0x30).
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