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TAS5706A View Datasheet(PDF) - Texas Instruments

Part NameTAS5706A TI
Texas Instruments TI
Description20-W Stereo Digital Audio Power Amplifier with EQ and DRC
TAS5706A Datasheet PDF : 71 Pages
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TAS5706A
TAS5706B
TAS5706A is Not Recommended for New Designs
SLOS606D – MARCH 2009 – REVISED SEPTEMBER 2009............................................................................................................................................. www.ti.com
Left-Justified
Left-justified (LJ) timing uses LRCLK to define when the data being transmitted is for the left channel and when it
is for the right channel. LRCLK is high for the left channel and low for the right channel. A bit clock running at 32,
48, or 64 × fS is used to clock in the data. The first bit of data appears on the data lines at the same time LRCLK
toggles. The data is written MSB first and is valid on the rising edge of the bit clock. The DAP masks unused
trailing data bit positions.
2-Channel Left-Justified Stereo Input
LRCLK
32 Clks
Left Channel
32 Clks
Right Channel
SCLK
SCLK
MSB
24-Bit Mode
23 22
98
20-Bit Mode
19 18
54
16-Bit Mode
15 14
10
54
10
10
LSB MSB
23 22
98
54
19 18
54
10
15 14
10
NOTE: All data presented in 2s-complement form with MSB first.
Figure 33. Left-Justified 64-fS Format
10
LSB
T0034-02
26
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