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AD7397AN View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
AD7397AN Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
AD7396/AD7397
Pin No.
1
2
3
4
5
6
7–18
7, 8
9–18
19
20
21
22
23
24
Name
VOUTA
AGND
DGND
LDA
SHDN
RS
D0–D11
NC
D0–D9
CS
A/B
LDB
VDD
VREF
VOUTB
PIN FUNCTION DESCRIPTIONS
DAC A Voltage Output.
Analog Ground.
Digital Ground.
Load DAC A Register Strobe. Transfers input register data to the DAC A register. Active
low inputs, Level sensitive latch. May be connected together with LDB to double-buffer load
both DAC registers simultaneously.
Power Shutdown Active Low Input. DAC register contents are saved as long as power stays
on the VDD pin.
Resets Input and DAC Register to Zero Condition. Asynchronous active low input.
Twelve Parallel Input Data Bits. D11 = MSB Pin 18, D0 = LSB Pin 7, AD7396.
No Connect Pins 7 and 8 On the AD7397 Only.
Ten Parallel Input Data Bits. D9 = MSB Pin 18, D0 = LSB Pin 9, AD7397 Only.
Chip Select Latch Enable, Active Low.
DAC Input Register Address Select DACA = 1 or DACB = 0.
Load DAC B Register Strobe. Transfers input register data to the DAC B register. Active low
inputs, Level sensitive latch. May be connected together with LDA to double-buffer load
both DAC registers simultaneously.
Positive Power Supply Input. Specified range of operation +2.7 V to +5.5 V.
DAC Reference Input Pin. Establishes DAC full-scale voltage.
DAC B Voltage Output.
PIN CONFIGURATIONS
VOUTA 1
AGND 2
DGND 3
LDA 4
24 VOUTB
23 VREF
22 VDD
21 LDB
SHDN
RS
D0
5 AD7396 20 A/B
6 TOP VIEW 19 CS
7 (Not to Scale) 18 D11
D1 8
17 D10
D2 9
16 D9
D3 10
15 D8
D4 11
14 D7
D5 12
13 D6
VOUTA 1
AGND 2
DGND 3
LDA 4
24 VOUTB
23 VREF
22 VDD
21 LDB
SHDN 5 AD7397 20 A/B
RS 6 TOP VIEW 19 CS
NC 7 (Not to Scale) 18 D9
NC 8
17 D8
D0 9
16 D7
D1 10
15 D6
D2 11
14 D5
D3 12
13 D4
NC = NO CONNECT
–6–
REV. 0
 

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