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DAC8043AFRUZ3 View Datasheet(PDF) - Analog Devices

Part Name
Description
Manufacturer
DAC8043AFRUZ3 Datasheet PDF : 9 Pages
1 2 3 4 5 6 7 8 9
a
FEATURES
Compact SOIC, and TSSOP Packages
True 12-Bit Accuracy
5 V Operation @ <10 A
Fast 3-Wire Serial Input
Fast 1 s Settling Time
2.4 MHz 4-Quadrant Multiply BW
Pin-for-Pin Upgrade for DAC8043
Standard and Rotated Pinout
APPLICATIONS
Ideal for PLC Applications in Industrial Control
Programmable Amplifiers and Attenuators
Digitally Controlled Calibration and Filters
Motion Control Systems
GENERAL DESCRIPTION
The DAC8043A is an improved high accuracy 12-bit multiply-
ing digital-to-analog converter in space-saving 8-lead packages.
Featuring serial input, double buffering and excellent analog
performance, the DAC8043A is ideal for applications where PC
board space is at a premium. Improved linearity and gain error
performance permit reduced parts count through the elimina-
tion of trimming components. Separate input clock and load
DAC control lines allow full user control of data loading and
analog output.
The circuit consists of a 12-bit serial-in/parallel-out shift regis-
ter, a 12-bit DAC register, a 12-bit CMOS DAC and control
logic. Serial data is clocked into the input register on the rising
edge of the CLOCK pulse. When the new data word has been
clocked in, it is loaded into the DAC register with the LD input
pin. Data in the DAC register is converted to an output current
by the D/A converter.
Consuming only 10 µA from a single 5 V power supply, the
DAC8043A is the ideal low power, small size, high performance
solution to many application problems.
The DAC8043A is specified over the extended industrial
(–40°C to +85°C) temperature range. DAC8043A is available
in a PDIP package, and the low profile 1.75 mm height SOIC-8
surface mount packages. The DAC8043AFRU is available for
ultra-compact applications in a thin 1.1 mm TSSOP-8 package.
12-Bit Serial Input
Multiplying D/A Converter
DAC8043A
FUNCTIONAL BLOCK DIAGRAM
VDD
VREF
LD
CLK
SRI
DAC8043A
DAC
12
DAC REG
12
12-BIT SHIFT
REGISTER
RFB
IOUT
GND
0.5
0.4
TA = +25؇C, +85؇C, –40؇C
VDD = +5V
0.3
VREF = –10V
0.2
0.1
0
–0.1
–0.2
–0.3
–0.4
–0.5
0
512 1024 1536 2048 2560 3072 3584 4096
CODE
Figure 1. Integral Nonlinearity Error vs. Code
REV. B
Information furnished by Analog Devices is believed to be accurate and
reliable. However, no responsibility is assumed by Analog Devices for its
use, nor for any infringements of patents or other rights of third parties
which may result from its use. No license is granted by implication or
otherwise under any patent or patent rights of Analog Devices.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A.
Tel: 781/329-4700 World Wide Web Site: http://www.analog.com
Fax: 781/461-3113
© Analog Devices, Inc., 2006
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