AD7835APZ-REEL1 View Datasheet(PDF) - Analog Devices

Part Name

Description

Manufacturer

AD7835APZ-REEL1

LC2MOS Quad 14-Bit DACs

Analog Devices 

AD7834/AD7835

DSG VOLTAGE RANGE

During power-on, the VOUT pins of the AD7834/AD7835 are

connected to the relevant DSG pins via G6 and the thin-film

resistor, R. The DSG potential must obey the maximum ratings

at all times. Thus, the voltage at DSG must always be within the

range VSS – 0.3 V to VDD + 0.3 V. However, to keep the voltages

at the VOUT pins of the AD7834/AD7835 within ±2 V of the

relevant DSG potential during power-on, the voltage applied to

DSG should also be kept within the range AGND – 2 V to

AGND + 2 V.

Once the AD7834/AD7835 have powered on and the on-chip

amplifiers have settled, the situation is as shown in Figure 23.

Any voltage subsequently applied to the DSG pin is buffered by

the same amplifier that buffers the DAC output voltage in

normal operation. Thus, for specified operations, the maximum

voltage applied to the DSG pin increases to the maximum

allowable VREF(+) voltage, and the minimum voltage applied to

DSG is the minimum VREF(−) voltage. After the AD7834 or

AD7835 has fully powered on, the outputs can track any DSG

voltage within this minimum/maximum range.

Rev. D | Page 18 of 28

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