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AD7874BR View Datasheet(PDF) - Analog Devices

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Description
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AD7874BR Datasheet PDF : 16 Pages
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AD7874
TERMINOLOGY
ACQUISITION TIME
Acquisition Time is the time required for the output of the
track/hold amplifiers to reach their final values, within ± 1/2
LSB, after the falling edge of INT (the point at which the track/
holds return to track mode). This includes switch delay time,
slewing time and settling time for a full-scale voltage change.
APERTURE DELAY
Aperture Delay is defined as the time required by the internal
switches to disconnect the hold capacitors from the inputs. This
produces an effective delay in sample timing. It is measured by
applying a step input and adjusting the CONVST input position
until the output code follows the step input change.
APERTURE DELAY MATCHING
Aperture Delay Matching is the maximum deviation in aperture
delays across the four on-chip track/hold amplifiers.
APERTURE JITTER
Aperture Jitter is the uncertainty in aperture delay caused by
internal noise and variation of switching thresholds with signal
level.
DROOP RATE
Droop Rate is the change in the held analog voltage resulting
from leakage currents.
CHANNEL-TO-CHANNEL ISOLATION
Channel-to-Channel Isolation is a measure of the level of
crosstalk between channels. It is measured by applying a full-
scale 1 kHz signal to the other three inputs. The figure given is
the worst case across all four channels.
SNR, THD, IMD
See DYNAMIC SPECIFICATIONS section.
PIN CONFIGURATIONS
DIP and SOIC
VIN1 1
VIN2 2
VDD 3
INT 4
28 VIN4
27 VIN3
26 VSS
25 REF OUT
CONVST 5
24 REF IN
RD 6
23 AGND
CS 7 AD7874 22 DB0 (LSB)
TOP VIEW
CLK 8 (Not to Scale) 21 DB1
VDD 9
20 DB2
DB11 (MSB) 10
19 DB3
DB10 11
18 DB4
DB9 12
17 DB5
DB8 13
16 DB6
DGND 14
15 DB7
LCCC
4 3 2 1 28 27 26
CONVST 5
RD 6
CS 7
CLK 8
VDD 9
DB11 (MSB) 10
DB10 11
AD7874
TOP VIEW
(Not to Scale)
25 REF OUT
24 REF IN
23 AGND
22 DB0 (LSB)
21 DB1
20 DB2
19 DB3
12 13 14 15 16 17 18
–4–
REV. C
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