LC58E76
Pin Functions
Pin
VDD
VSS
QFC-80
I/O
Pin No.
—
24
—
23
Power supply
LCD drive power supply
Function
Option
At reset
VDD1
VDD2
—
—
22
21
VDD
VDD1
VDD2
VSS
NON
1/1 bias
1/2 bias 1/3 bias
CUP1
CUP2
CFIN
CFOUT
XTIN
XTOUT
S1
S2
S3
S4
K1
K2
K3
K4
M1
M2
M3
M4
A1
A2
A3
A4
P1
P2
P3
P4
Switching pin used to supply the LCD drive voltage to the VDD1 and
VDD2 pins
—
3
• Connect a nonpolar capacitor between CUP1 and CUP2 when 1/2 or
—
4
1/3 bias is used.
• Leave open when a bias other than 1/2 or 1/3 is used.
Input
System clock oscillator connections
25
• Ceramic resonator connection (CF specifications)
• RC component connection (RC specifications)
• External signal input pin (CFOUT is left open)
Output
26
This oscillator is stopped by the execution of a STOP or SLOW
instruction.
• CF specifications
• Not used
Input
20
Reference calculation (clock specifications, LCD alternation frequency),
system clock oscillator
• 32k specifications
• 32 kHz crystal resonator connection
• 65 kHz crystal resonator connection
Output
19
This oscillator is stopped by the execution of a STOP instruction.
• 65k specifications
• 38k specifications
• Not used
Input
I/O
I/O
I/O
I/O
Input-only ports
27
• Input pins used to read data into RAM
28
• Built-in 7.8 ms and 1.95 ms chatter exclusion circuits
29
• Built-in pull-up/pull-down resistors
30
Note: The 7.8 ms and 1.95 ms times are the times when ø0 is
32.768 kHz.
• Transistors to hold
a low or high level
• Selection of either
pull-up or pull-
down resistors
• The pull-up or pull-
down resistors are
on.
Note: These pins go
to the floating
state when
reset is cleared.
• The pull-up or pull-
down resistors are
31
32
33
34
I/O ports
• Input pins used to read data into RAM
• Output pins used to output data from RAM
• Built-in 7.8 ms and 1.95 ms input-mode chatter exclusion circuits. The
selection of 7.8 or 1.95 ms is linked to that for the S ports.
Note: The 7.8 ms and 1.95 ms times are the times when ø0 is
• Transistors to hold
a low or high level
• Selection of either
pull-up or pull-
down resistors
on.
Note: These pins go
to the floating
state when
reset is cleared.
• Input mode
32.768 kHz.
• Output latch data is
set high.
I/O ports
35
• Input pins used to read data into RAM
36
• Output pins used to output data from RAM
The same as K1 to The same as K1 to
37
• M4 is used as the external clock input pin in TM2 mode 3.
K4
K4
38
* The minimum period for the external clock is twice the cycle time.
• Built-in pull-up/pull-down resistors
11
I/O ports
12
• Input pins used to read data into RAM
13
• Output pins used to output data from RAM
14
• Built-in pull-up/pull-down resistors
The same as K1 to
K4
The same as K1 to
K4
15
16
I/O ports
17
Function: The same as pins A1 to A4
18
The same as K1 to
K4
The same as K1 to
K4
Continued on next page.
No. 4434-4/17