TxOUT0
TCCS
TxOUT1
TxOUT2
Vdiff=
0V
TxCLK OUT
Notes:
1. Measurements at VDIFF = 0V
2. TCCS measured between earliest and latest LVDS edges.
3. TxCLK Differential Low-High Edge.
TIME
Figure 7. UT54LVDS217 Channel-to-Channel Skew
TCIP
Sample on L-H Edge
TxCLK IN
VDD/2
VDD/2
TCIH
TCIL
VDD/2
TxIN 0-20
VDD/2
TSTC
SETUP
THTC
HOLD
VDD/2
Figure 8. UT54LVDS217 Setup/Hold and High/Low Times
TxCLK IN
VDD/2
TCCD
TxCLK OUT
Vdiff=
0V
Figure 9. UT54LVDS217 Clock-to-Clock Out Delay