5962H8957701YA View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

5962H8957701YA

BCRTM

Aeroflex UTMC 

D. The BCRTM receives the Status Word response from

the receiving RT. The ME bit in the Status Word is set,

indicating the message is invalid. The BCRTM initiates

the auto retry function, (as programmed) on the

alternate bus, re-transmits the Command Words,

receives the correct Status Word, and stores the data

again in locations 0400H - 0403H. This time the Status

Word response

from the receiving RT indicates the message transfer

is successful.

E. The timer delay between the two successive

transactions counts down another 135µs before

proceeding. This is determined as follows:

The message transaction time is approximately130µs

(the only approximation is due to the range in status

response and intermessage gap times specified by MIL-

STD-1553B). Approximating that with the retry, the

total duration for the two attempts is 265µs.

F. The BCRTM reads the Tail Pointer of Command Block

1 and places it in the Current Command Register. It also

reads the Control Word, Command Word, and Data

List Pointer, and the first data word in the second

Command Block.

G. Since this is a BC-RT transfer, the BCRTM transmits

the receive command followed by two data words from

locations 0404H - 0405H in memory. The BCRTM

reads the second data word from memory while

transmitting the first.

H. The BCRTM receives the status response from the RT.

In this case, the Status Word indicates, by the ME bit

being low, that the message is valid. The Status Word

also has the Subsystem Fail bit set.

I. The Status Word is stored in the Command Block. The

BCRTM, having encountered the end of the list, halts

message transactions and waits for another start signal.

J. The BCRTM asserts a High-Priority Interrupt

indicating the end of the command list. Due to the

polling comparison match, the BCRTM also asserts a

Standard Priority Interrupt and logs the event in the

Interrupt

Log List.

8.0 BUS MONITOR ARCHITECTURE

The BCRTM’s bus monitor architecture is based on a

Command Block structure and internal, host-programmable

registers. Each message transactedover the MIL-STD-

1553B bus (for a monitored RT address) has an associated

Command Block, which the CPU sets up (see figures 17 and

18). The Command Block contains all the relevant message

and RT status information as well as programmable function

bits that allow the user to select functions and interrupts.

MONITOR CINROL/STATUS

1553 COMMAND WORD 1

1553 COMMAND WORD

DATA LIST POINTER

1553 STATUS WORD 1

1553 STATUS WORD 2

TAIL POINTER

Figure 17 BCRTM Bus Monitor Command Block

In a linked list Command Block structure, pointers delimit

each Command Block to the successive block (see figure 19)

A data pointer9 in theCommand Block allows efficient

space allocation because data blocks do not have to be

placed contiguosly in memory

COMMAND BLOCK #1

DATA LIST POINTER

DATA WORD #1

DATA WORD #2

X

LAST DATA WORD

X IS BETWEEN 1 & 32

Figure 18. Data Placement

A Monitor control/status word with an eight-bit Time Tag,

an Interrupt When Addressed bit, a Message Error bit, and

a Command Block Activated bit are in each Monitor

Command Block. The user can access these control/status

words to determine which Monitor Command Block, the

host can determine when particular remote terminal

has occured.

BCRTM-34

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