5962G8957701-ZX View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

5962G8957701-ZX

BCRTM

Aeroflex UTMC 

Exception Handling.

If an interrupting condition occurs during the message,

the following occurs:

For High-Priority Interrupts:

HPINT is asserted (if enabled in Register 7). For message

errors, the BCRTM is put in a hold state until the

interrupt is acknowledged (by writing a “1” to the

appropriate bit in Register 8).

For Standard Interrupts:

DMA arbitration (BURST)

Interrupt Status Word write

Command Block Pointer write

Tail Pointer read (into Register 6)

STDINTP pulses low

STDINTL asserted (if enabled)

Processing continues

If Retries are enabled and a Retry condition occurs, the

following DMA occurs:

DMA arbitration (BURST)

Control Word read

Command Word 1 read (from third location

of Command Block)

Data List Pointer read

The BCRTM proceeds from the current Command Block to

the next successive Command Block.

• If no Message Error has occurred during the current

Command Block, the following occurs:

DMA arbitration (BURST)

Command Block Tail Pointer read (to

determine location of next Command Block.

Note that this occurs only if no Retry).

DMA hold cycle

Control Word read (next Command Block)

Command Word 1 read (next Command

Block)

Data List Pointer read

• If the BCRTM detects a Message Error while

processing the current Command Block, the following

occurs:

DMA arbitration (BURST)

Control Word write

Command Block Tail Pointer read (to

determine location of next Command Block.

Note that this occurs only if no Retry.)

DMA hold cycle

Control Word read (next Command Block)

Command Word 1 read (next Command

Block)

Data List Pointer read

The BCRTM proceeds again from point A, B, or C as

shown above.

7.5 BC Operational Example (figure 22)

The BCRTM is programmed initially to accomplish the

following:

The first Command Block is for a four-word RT-RT transfer

with the BCRTM monitoring the transfer and storing

the data.

• Auto-retry is enabled on the opposite bus using only

one retry attempt, if the incoming Status Word is

received with the Message Error bit set.

• Wait for a time delay of 400 microseconds before

proceeding to the next Command Block.

• The Data List Pointer contains the address 0400H.

The second Command Block is for a BC-RT transfer of

two words.

• The End of List bit is set in its Control Word.

• The Data List Pointer contains the address 0404H.

• The Polling Enable bit is set and the Polling Compare

Register contains a one in Subsystem Fail position

(Bit 2).

Then:

A. The CPU initializes all the appropriate registers and

Command Blocks, and issues a Start Enable by writing

a “1” to Register 0, Bit 0.

B. The BCRTM, through executing a DMA cycle, reads

the Control Word, Command Words, and the Data List

Pointer. The delay timer starts and message execution

begins by transmitting the receive and transmit

commands stored in the Command Blocks. The

BCRTM then waits to receive the Status Word back

from the transmitting RT.

C. The BCRTM receives the RT Status Word with all status

bits low from the transmitting RT and stores the Status

Word in Command Block 1. The incoming data words

from the transmitting RT follow. The BCRTM stores

them in memory locations 0400H - 0403H.

If the Status Word indicates that the message cannot be

transmitted (Message Error), the response time-out

clock counts to zero and the allotted message time runs

out. An auto-retry can be initiated if programmed to do

so. Nevertheless, the ME bit in the Control Word is set.

BCRTM-33

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