5962H8957701-ZX View Datasheet(PDF) - Aeroflex UTMC

Part Name

Description

Manufacturer

5962H8957701-ZX

BCRTM

Aeroflex UTMC 

6.2 RT Error Detection

In accordance with MIL-STD-1553B, the remote terminal

handles superseding commands on the same or opposite bus.

When receiving, the Remote Terminal performs a response

time-out function of 56µs for RT-RT transfers. If the

response time-out condition occurs, a Message Error bit can

be set in the 1553 status word and in the Message Status

Word. Error checking occurs on both of the Manchester

logic and the word formats. Detectable errors include word

count errors, long words, short words, Manchester errors

(including zero crossing deviation), parity errors, and data

discontiguity.

6.3 RT Operational Sequence

The following is a general description of the typical

behavior of the BCRTM as it processes a message in the RT

mode. It is assumed that the user has already written a “1”

to Register 0, bit 0, enabling RT operation.

Valid Command Received.

COMSTR goes active

• DMA Descriptor Read. After receiving a valid

command, the BCRTM initiates a burst DMA:

DMA arbitration (BURST)

Control Word read

Message Status List Pointer read

Data List Pointer read

Data Transmitted/Received.

• Data Word DMA.

If the BCRTM needs to transmit data from memory,

it initiates a DMA cycle for each Data Word shortly

before the Data Word is needed on the 1553B bus:

DMA arbitration

Data Word read (starting at Data List Pointer

address, incremented for each successive

word)

If the BCRTM receives data, it writes each Data

Word to memory after the Data Word is received:

DMA arbitration

Data Word write (starting at Data List Pointer

address, incremented for each successive

word)

Status Word Transmission.

The BCRTM automatically transmits the Status

Word as defined in MIL-STD-1553B.The Message

Error and Broadcast Command Received bits are

generated internally.Writing to Register 10 enables

the other predefined bits. For illegalized commands,

the BCRTM also sets the Message Error Bit in the

1553 Status Word.

Exception Handling.

If an interrupting condition occurs during the

message, the following occurs:

For High-Priority Interrupts:

HPINT is asserted (if enabled in Register 7).

For message errors, the BCRTM is put in a

hold state until the interrupt is acknowledged

(by writing a “1” to the appropriate bit in

Register 8).

For Standard Interrupts:

DMA arbitration (BURST)

Interrupt Status Word write

RT Descriptor Block Pointer write

Tail Pointer read (into Register 6)

STDINTP pulses low

STDINTL asserted (if enabled)

Processing continues

• Descriptor Write.

After the BCRTM processes the message, a final

DMA burst occurs to update the descriptor block, if

necessary:

DMA arbitration (BURST)

Message Status Word write

Data List Pointer write

(incremented by word count)

Message Status List Pointer write

(incremented by 1)

Control Word write (index decremented)

Note the following exceptions:

Mode codes without data require no

descriptor update.

Predefined mode codes (18 and 19) which do

not require access to memory for the data

word, do not involve updating the Data List

Pointer.

Messages with errors prevent updates to the

Data List Pointer.

If the message index was zero, neither the

Message Status List Pointer nor the Data List

Pointer is updated.

BCRTM-28

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